ZHCSDC6D November 2014 – February 2018 AMC7836
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics: DAC
- 6.6 Electrical Characteristics: ADC and Temperature Sensor
- 6.7 Electrical Characteristics: General
- 6.8 Timing Requirements
- 6.9 Typical Characteristics: DAC
- 6.10 Typical Characteristics: ADC
- 6.11 Typical Characteristics: Reference
- 6.12 Typical Characteristics: Temperature Sensor
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4 Device Functional Modes
- 7.5 Programming
- 7.6
Register Maps
- 7.6.1 Interface Configuration: Address 0x00 – 0x02
- 7.6.2
Device Identification: Address 0x03 – 0x0D
- 7.6.2.1 Chip Type Register (address = 0x03) [reset = 0x08]
- 7.6.2.2 Chip ID Low Byte Register (address = 0x04) [reset = 0x36]
- 7.6.2.3 Chip ID High Byte Register (address = 0x05) [reset = 0x0C]
- 7.6.2.4 Version ID Register (address = 0x06) [reset = 0x00]
- 7.6.2.5 Manufacturer ID Low Byte Register (address = 0x0C) [reset = 0x51]
- 7.6.2.6 Manufacturer ID High Byte Register (address = 0x0D) [reset = 0x04]
- 7.6.3 Register Update (Buffered Registers): Address 0x0F
- 7.6.4
General Device Configuration: Address 0x10 through 0x17
- 7.6.4.1 ADC Configuration Register (address = 0x10) [reset = 0x00]
- 7.6.4.2 False Alarm Configuration Register (address = 0x11) [reset = 0x70]
- 7.6.4.3 GPIO Configuration Register (address = 0x12) [reset = 0x00]
- 7.6.4.4 ADC MUX Configuration 0 Register (address = 0x13) [reset = 0x00]
- 7.6.4.5 ADC MUX Configuration 1 Register (address = 0x14) [reset = 0x00]
- 7.6.4.6 ADC MUX Configuration 2 Register (address = 0x15) [reset = 0x00]
- 7.6.4.7 DAC Clear Enable 0 Register (address = 0x18) [reset = 0x00]
- 7.6.4.8 DAC Clear Enable 1 Register (address = 0x19) [reset = 0x00]
- 7.6.5 DAC Clear and ALARMOUT Source Select: Address 0x1A through 0x1D
- 7.6.6 DAC Range: Address 0x1E
- 7.6.7
ADC and Temperature Data: Address 0x20 through 0x4B
- 7.6.7.1 ADCn-Data (Low Byte) Register (address = 0x20 through 0x49) [reset = 0x00]
- 7.6.7.2 ADCn-Data (High Byte) Register (address = 0x20 through 0x49) [reset = 0x00]
- 7.6.7.3 Temperature Data (Low Byte) Register (address = 0x4A) [reset = 0x00]
- 7.6.7.4 Temperature Data (High Byte) Register (address = 0x4B) [reset = 0x00]
- 7.6.8 DAC Data: Address 0x50 through 0x6F
- 7.6.9 Status Registers: Address 0x70 through 0x72
- 7.6.10 GPIO: Address 0x7A
- 7.6.11
Out-Of-Range ADC Thresholds: Address 0x80 through 0x93
- 7.6.11.1 ADCn-Upper-Thresh (Low Byte) Register (address = 0x80 through 0x93) [reset = 0xFF]
- 7.6.11.2 ADCn-Upper-Thresh (High Byte) Register (address = 0x80 through 0x93) [reset = 0x0F]
- 7.6.11.3 ADCn-Lower-Thresh (Low Byte) Register (address = 0x80 through 0x93) [reset = 0x00]
- 7.6.11.4 ADCn-Lower-Thresh (High Byte) Register (address = 0x80 through 0x93) [reset = 0x00]
- 7.6.11.5 LT-Upper-Thresh (Low Byte) Register (address = 0x94) [reset = 0xFF]
- 7.6.11.6 LT-Upper-Thresh (High Byte) Register (address = 0x95) [reset = 0x07]
- 7.6.11.7 LT-Lower-Thresh (Low Byte) Register (address = 0x96) [reset = 0x00]
- 7.6.11.8 LT-Lower-Thresh (High Byte) Register (address = 0x97) [reset = 0x08]
- 7.6.12 Alarm Hysteresis Configuration: Address 0xA0 and 0xA5
- 7.6.13
Clear and Power-Down Registers: Address 0xB0 through 0XB4
- 7.6.13.1 DAC Clear 0 Register (address = 0xB0) [reset = 0x00]
- 7.6.13.2 DAC Clear 1 Register (address = 0xB1) [reset = 0x00]
- 7.6.13.3 Power-Down 0 Register (address = 0xB2) [reset = 0x00]
- 7.6.13.4 Power-Down 1 Register (address = 0xB3) [reset = 0x00]
- 7.6.13.5 Power-Down 2 Register (address = 0xB4) [reset = 0x00]
- 7.6.14 ADC Trigger: Address 0xC0
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
7.3.2.4.2 Unipolar Inputs Out-of-Range Alarms
The AMC7836 includes high-limit and low-limit detection for the internal temperature sensor. Figure 56 shows the temperature detection block. The values in the LT upper and lower threshold registers (address 0x94 through 0x97) set the limits for the temperature sensor. The temperature sensor detector can issue either a high-alarm (LT-HIGH-ALR bit) or a low-alarm (LT-LOW-ALR bit) in the alarm status 1 register (address 0x71) depending on whether the high or low thresholds were exceeded. To implement single, upper-bound threshold detection for the temperature sensor, the host processor can set the upper-bound threshold to the desired value and the lower-bound threshold to the default value. For lower-bound threshold detection, the host processor can set the lower-bound threshold to the desired value and the upper-bound threshold to the default value.
In addition to the programmable threshold alarms the temperature sensor detection circuit also includes a die thermal-alarm flag which continuously monitors the die temperature. When the die temperatures exceeds 150?C the die thermal alarm flag (THERM-ALR bit) in the alarm status 1 register (address 0x71) is set. The internal temperature sensor must be enabled for this alarm to be functional.
Figure 56. Internal Temperature Out-of-Range Alarms