ZHCSR80A June 2009 – January 2023 AMC6821-Q1
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 說明（續(xù)）
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Functional Block Diagram
- 8.2 Feature Description
- 8.3 Device Functional Modes
- 8.4 Programming
- 8.5 Register Map
- 9 Application and Implementation
- 10Device and Documentation Support
- 11Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DBQ|16
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
8.2.3 PWM Output
The PWM-Out pin is an open-drain output. When PWM-EN of Configuration Register 2 is cleared ('0'), the PWM-Out pin is disabled and goes into a high-impedance status. When PWM-EN is set ('1'), the PWM-Out pin is enabled to drive the fan. When enabled, the status of the PWM-Out pin is determined by the PWM duty cycle and phase bits (PWMINV of Configuration Register 1). When PWMINV = 0 (default), the PWM-Out pin goes low for 100% duty cycle (suitable for driving the fan using a PMOS FET). Setting PWMINV to '1' makes the PWM-Out pin go high (with an external pull-up resistor) for a 100% duty cycle. This setting is used to drive an NMOS-power FET.
Figure 8-5 PWM Output