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ZHCSHK2C August 2019 – May 2025 AMC3301

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

DWE|16
- MPSS091

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

5.9 Electrical Characteristics

minimum and maximum specifications apply from T_A = –40°C to +125°C, VDD = 3.0 V to 5.5 V_,INP = –250 mV to +250 mV, INN = HGND = 0 V, and the external components listed in the Typical Application section; typical specifications are at T_A = 25°C, and VDD = 3.3 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
ANALOG INPUT
R_IN	Single-ended input resistance	INN = HGND		19		kΩ
R_IND	Differential input resistance			22		kΩ
I_IB	Input bias current	INP = INN = HGND; I_IB = (I_IBP + I_IBN) / 2	–41	–30	–24	μA
TCI_IB	Input bias current drift			0.8		nA/°C
I_IO	Input offset current	I_IO = \|I_IBP – I_IBN\|		1.4		nA
C_IN	Single-ended input capacitance	INN = HGND, f_IN = 275 kHz		2		pF
C_IND	Differential input capacitance	f_IN = 275 kHz		1		pF
ANALOG OUTPUT
	Nominal gain			8.2		V/V
V_CMout	Common-mode output voltage		1.39	1.44	1.49	V
V_CLIPout	Clipping differential output voltage	V_OUT = (V_OUTP– V_OUTN); \|V_IN\| = \|V_INP– V_INN\| > V_Clipping		±2.49		V
V_Failsafe	Failsafe differential output voltage	V_OUT = (V_OUTP– V_OUTN); V_{DCDC_OUT} ≤ V_DCDCUV, or V_{HLDO_OUT} ≤ V_HLDOUV		–2.57	-2.5	V
BW	Output bandwidth		290	334		kHz
R_OUT	Output resistance	On OUTP or OUTN		0.2		Ω
	Output short-circuit current	On OUTP or OUTN, sourcing or sinking, INP = INN = HGND, outputs shorted to either GND or VDD		14		mA
CMTI	Common-mode transient immunity	\|HGND – GND\| = 2 kV	85	135		kV/μs
ACCURACY
V_OS	Input offset voltage⁽¹⁾⁽²⁾	T_A = 25°C, INP = INN = HGND	–0.15	±0.02	0.15	mV
TCV_OS	Input offset drift⁽¹⁾⁽²⁾⁽⁴⁾		–1	±0.15	1	uV/°C
E_G	Gain error⁽¹⁾	T_A = 25°C	–0.2%	±0.04%	0.2%
TCE_G	Gain error drift⁽¹⁾⁽⁵⁾		–40	±6	40	ppm/°C
	Nonlinearity⁽¹⁾		–0.04%	±0.002%	0.04%
	Nonlinearity drift⁽¹⁾			0.9		ppm/°C
SNR	Signal-to-noise ratio	V_IN = 0.5 V_PP, f_IN = 1 kHz, BW = 10 kHz, 10 kHz filter	80	85		dB
SNR	Signal-to-noise ratio	V_IN = 0.5 V_PP, f_IN = 10 kHz, BW = 100 kHz, 1 MHz filter	67	71		dB
THD	Total harmonic distortion⁽³⁾	V_IN = 0.5 Vpp, f_IN = 10 kHz, BW = 100 kHz		–85		dB
	Output noise	INP = INN = HGND, f_IN = 0 Hz, BW = 100 kHz		300		μV_RMS
CMRR	Common-mode rejection ratio	f_IN = 0 Hz, V_{CM min} ≤ V_CM ≤V_{CM max}		–97		dB
CMRR	Common-mode rejection ratio	f_IN = 10 kHz, V_{CM min} ≤ V_CM ≤V_{CM max}		–98		dB
PSRR	Power-supply rejection ratio	VDD from 3.0 V to 5.5 V, at dc, input referred		–109		dB
PSRR	Power-supply rejection ratio	INP = INN = HGND, VDD from 3.0 V to 5.5 V, 10 kHz / 100 mV ripple, input referred		–98		dB
DIGITAL OUTPUT (DIAG)
V_OL	Low-level output voltage	I_SINK= 4 mA		80	250	mV
I_LKG	Open-drain output leakage current	VDD = 5V		5	100	nA
POWER SUPPLY
IDD	Low-side supply current	no external load on HLDO		27.5	40	mA
IDD	Low-side supply current	1 mA external load on HLDO		29.5	42	mA
VDD_UV	VDD analog undervoltage detection threshold	VDD rising			2.9	V
VDD_UV	VDD analog undervoltage detection threshold	VDD falling			2.8	V
VDD_POR	VDD digital reset threshold	VDD rising			2.5	V
VDD_POR	VDD digital reset threshold	VDD falling			2.4	V
V_{DCDC_OUT}	DCDC output voltage	DCDC_OUT to HGND	3.1	3.5	4.65	V
V_DCDCUV	DCDC output undervoltage detection threshold voltage	DCDC output falling	2.1	2.25		V
V_{HLDO_OUT}	High-side LDO output voltage	HLDO to HGND, 4 mA external load, VDD > 3.6 V	3	3.2	3.4	V
V_HLDOUV	High-side LDO output undervoltage detection threshold voltage	HLDO output falling	2.4	2.6		V
I_H	High-side supply current for auxiliary circuitry	3 V ≤ VDD < 3.6 V, load connected from HLDO_OUT to HGND, non-switching			1	mA
I_H	High-side supply current for auxiliary circuitry	3.6 V ≤ VDD ≤ 5.5 V, load connected from HLDO_OUT to HGND, non-switching			4.0	mA
t_AS	Analog settling time	VDD step to 3.0 V, to OUTP and OUTN valid, 0.1% settling		0.9	1.4	ms

(1) The typical value includes one standard deviation ("sigma") at nominal operating conditions.

(2) This parameter is input referred.

(3) THD is the ratio of the rms sum of the amplitues of first five higher harmonics to the amplitude of the fundamental.

(4) Offset error temperature drift is calculated using the box method, as described by the following equation:
TCV_OS = (V_OS,MAX - V_OS,MIN) / TempRange where V_OS,MAX and V_OS,MIN refer to the maximum and minimum V_OS values measured within the temperature range (–40 to 125℃).

(5) Gain error temperature drift is calculated using the box method, as described by the following equation:
TCE_G (ppm) = ((E_G,MAX - E_G,MIN) / TempRange) x 10⁴ where E_G,MAX and E_G,MIN refer to the maximum and minimum E_G values (in %) measured within the temperature range (–40 to 125℃).