5 Pin Configuration and Functions

Figure 5-1 RSB Package, 40-Pin WQFN
(Top View)

Table 5-1 Pin Functions

PIN		TYPE	DESCRIPTION
NAME	NO.	TYPE	DESCRIPTION
INPUT/REFERENCE
AINM	14	I	Negative analog input
AINP	13	I	Positive analog input
REFBUF	4	I	1.2-V external voltage reference input for use with internal reference buffer. Internal 100 kΩ pull-up resistor to AVDD. This pin is also used to configure default operating conditions.
REFGND	3	I	Reference ground input, 0 V
VCM	9	O	Common-mode voltage output for the analog inputs, 0.95 V
VREF	2	I	External voltage reference input, 1.6 V.
CLOCK
CLKM	7	I	Negative differential sampling clock input for the ADC
CLKP	6	I	Positive differential sampling clock input for the ADC
CONFIGURATION
NC	18	-	Do not connect
PDN/SYNC	1	I	Power down, synchronization input. This pin can be configured via the SPI interface. Active high. This pin has an internal 21 kΩ pull-down resistor.
RESET	10	I	Hardware reset; active high. This pin has an internal 21 kΩ pull-down resistor.
SCLK	40	I	Serial interface clock input. This pin has an internal 21 kΩ pull-down resistor.
SDIO	39	I	Serial interface data input and output. This pin has an internal 21 kΩ pull-down resistor.
SEN	17	I	Serial interface enable. Active low. This pin has an internal 21 kΩ pull-up resistor to AVDD.
DIGITAL INTERFACE
D0	38	O	CMOS output used with 16 bit output (configured via output bit formatter). This becomes LSB. When not used can be left unconnected.
D1	37	O	CMOS output used with 16 bit output (configured via output bit formatter). This becomes LSB-1. When not used can be left unconnected.
D2	36	O	CMOS output for data bit D0.
D3	35	I/O	CMOS output for data bit D1. Used as DCLKIN in serial CMOS output modes.
D4	34	O	CMOS output for data bit D2.
D5	33	O	CMOS output for data bit D3.
D6	32	O	CMOS output for data bit D4.
D7	30	O	CMOS output for data bit D5.
D8	29	O	CMOS output for data bit D6.
D9	28	O	CMOS output for data bit D7.
D10	27	O	CMOS output for data bit D8.
D11	24	O	CMOS output for data bit D9. Lane 0 in serial CMOS output mode.
D12	23	O	CMOS output for data bit D10. Lane 1 in serial CMOS output mode.
D13	22	O	CMOS output for data bit D11.
D14	21	O	CMOS output for data bit D12.
D15	20	O	CMOS output for data bit D13 (MSB).
DCLK	26	O	CMOS output for data bit clock
FCLK	19	O	Frame clock output in serial CMOS output mode.
POWER SUPPLY
AVDD	5,8,11,16	I	Analog 1.8-V power supply
GND	12,15	I	Ground, 0 V
IOGND	25	I	Ground, 0 V for digital interface
IOVDD	31	I	1.8-V power supply for digital interface
PowerPAD?	--	--	Connect to ground