ZHCSHX9L November 2008 – February 2019 ADC14155QML-SP
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 ADC14155 Converter Electrical Characteristics DC Parameters
- 6.6 ADC14155 Converter Electrical Characteristics (Continued) DYNAMIC Parameters
- 6.7 ADC14155 Converter Electrical Characteristics (Continued) Logic and Power Supply Electrical Characteristics
- 6.8 ADC14155 Converter Electrical Characteristics (Continued) Timing and AC Characteristics
- 6.9 Timing Diagram
- 6.10 Transfer Characteristic
- 6.11 Typical Performance Characteristics, DNL, INL
- 6.12 Typical Performance Characteristics, Dynamic Performance
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機(jī)械、封裝和可訂購信息
封裝選項(xiàng)
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- NBA|48
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
8.1 Application Information
To achieve the best dynamic performance, the clock source driving the CLK input must have a sharp transition region and be free of jitter. Isolate the ADC clock from any digital circuitry with buffers, as with the clock tree shown in Figure 23. The gates used in the clock tree must be capable of operating at frequencies much higher than those used if added jitter is to be prevented. Best performance will be obtained with a differential clock input drive, compared with a single-ended drive.
As mentioned in Power Supply Recommendations, it is good practice to keep the ADC clock line as short as possible and to keep it well away from any other signals. Other signals can introduce jitter into the clock signal, which can lead to reduced SNR performance, and the clock can introduce noise into other lines. Even lines with 90° crossings have capacitive coupling, so try to avoid even these 90° crossings of the clock line.
Figure 23. Isolating the ADC Clock From Other Circuitry With a Clock Tree