SBVS457A August   2024  – September 2024 TPS7A20U

PRODUCTION DATA  

1.   1
2. 1 Features
3. 2 Applications
4. 3 Description
5. 4 Pin Configuration and Functions
6. 5 Specifications
   1. 5.1 Absolute Maximum Ratings
   2. 5.2 ESD Ratings
   3. 5.3 Recommended Operating Conditions
   4. 5.4 Thermal Information
   5. 5.5 Electrical Characteristics
   6. 5.6 Switching Characteristics
   7. 5.7 Typical Characteristics
7. 6 Detailed Description
   1. 6.1 Overview
   2. 6.2 Functional Block Diagram
   3. 6.3 Feature Description
      1. 6.3.1 Low Output Noise
      2. 6.3.2 Smart Enable
      3. 6.3.3 Dropout Voltage
      4. 6.3.4 Current Limit
      5. 6.3.5 Undervoltage Lockout (UVLO)
      6. 6.3.6 Thermal Shutdown
      7. 6.3.7 Active Discharge
   4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
8. 7 Application and Implementation
   1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Load Transient Response
      4. 7.1.4 Undervoltage Lockout (UVLO) Operation
      5. 7.1.5 Power Dissipation (PD)
         1. 7.1.5.1 Estimating Junction Temperature
         2. 7.1.5.2 Recommended Area for Continuous Operation
   2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
   3. 7.3 Power Supply Recommendations
   4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
9. 8 Device and Documentation Support
   1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
   2. 8.2 Receiving Notification of Documentation Updates
   3. 8.3 Support Resources
   4. 8.4 Trademarks
   5. 8.5 Electrostatic Discharge Caution
   6. 8.6 Glossary
10. 9 Revision History
11. 10Mechanical, Packaging, and Orderable Information

TPS7A20U 75mA, Low-Noise, Low-IQ, High-PSRR LDO