SLLSE84D May 2011 – May 2017 SN65HVD101 , SN65HVD102
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Wake-up Detection
- 9.3.2 Current Limit Indication - Short Circuit Current Detection
- 9.3.3 Active Current Limit Condition: VTHL > VCQ ≥ VTHH
- 9.3.4 Inactive Current Limit Condition: VTHL < VCQ < VTHH
- 9.3.5 Over-temperature Detection
- 9.3.6 CQ Current-limit Adjustment
- 9.3.7 Transceiver Function Tables
- 9.3.8 Voltage Regulator (Not Available in SN65HVD102)
- 9.4 Device Functional Modes
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
- RGB|20
Thermal pad, mechanical data (Package|Pins)
- RGB|20
Orderable Information
1 Features
- Configurable CQ Output: Push-Pull, High-Side, or Low-Side for SIO Mode
- Remote Wake-Up Indicator
- Current Limit Indicator
- Power-Good Indicator
- Overtemperature Protection
- Reverse Polarity Protection
- Configurable Current Limits
- 9-V to 36-V Supply Range
- Tolerant to 50-V Peak Line Voltage
- 3.3-V/5-V Configurable Integrated LDO (SN65HVD101 ONLY)
- 20-pin QFN Package, 4 mm × 3.5 mm
2 Applications
- Suitable for IO-Link Device Nodes
3 Description
The SN65HVD101 and ‘HVD102 IO-Link PHYs implement the IO-Link interface for industrial point-to-point communication. When the device is connected to an IO-Link master through a 3-wire interface, the master can initiate communication and exchange data with the remote node while the SN65HVD10X acts as a complete physical layer for the communication.
The IO-Link driver output (CQ) can be used in push-pull, high-side, or low-side configurations using the EN and TX input pins. The PHY receiver converts the 24-V IO-Link signal on the CQ pin to standard logic levels on the RX pin. A simple parallel interface is used to receive and transmit data and status information between the PHY and the local controller.
The SN65HVD101 and 'HVD102 implement protection features for overcurrent, overvoltage and overtemperature conditions. The IO-Link driver current limit can be set using an external resistor. If a short-circuit current fault occurs, the driver outputs are internally limited, and the PHY generates an error signal (SC). These devices also implement an overtemperature shutdown feature that protects the device from high-temperature faults.
The SN65HVD102 operates from a single external 3.3-V or 5-V local supply. The SN65HVD101 integrates a linear regulator that generates either 3.3 V or 5 V from the IO-Link L+ voltage for supplying power to the PHY as well as a local controller and additional circuits.
The SN65HVD101 and 'HVD102 are available in the 20-pin RGB package (4 mm × 3,5 mm QFN) for space-constrained applications.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| SN65HVD101 | QFN (20) | 4.00 mm × 3.50 mm |
| SN65HVD102 |
- For all available packages, see the orderable addendum at the end of the data sheet.
