SNAS947 May   2025 LMK1C1102A , LMK1C1103A , LMK1C1104A , LMK1C1106A , LMK1C1108A

PRODUCTION DATA  

1.   1
2. 1 Features
3. 2 Applications
4. 3 Description
5. 4 Device Comparison
6. 5 Pin Configuration and Functions
7. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings
   3. 6.3 Recommended Operating Conditions
   4. 6.4 Thermal Information
   5. 6.5 Electrical Characteristics
   6. 6.6 Timing Requirements
   7. 6.7 Typical Characteristics
8. 7 Parameter Measurement Information
9. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
      1. 8.3.1 Fail-Safe Inputs
      2. 8.3.2 Asynchronous Output Enable
   4. 8.4 Device Functional Modes
10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
       1. 9.2.1 Design Requirements
       2. 9.2.2 Detailed Design Procedure
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
       1. 9.4.1 Layout Guidelines
       2. 9.4.2 Layout Example
11. 10Device and Documentation Support
    1. 10.1 Documentation Support
       1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
12. 11Revision History
13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

LMK1C110xA 1.8V, 2.5V, and 3.3V Low Noise Asynchronous LVCMOS Clock Buffer Family