SGZT005C February 2010 – July 2021 DP83848-EP , DP83848C , DP83848H , DP83848I , DP83848J , DP83848K , DP83848M , DP83848Q-Q1 , DP83848T , DP83848VYB , DP83848YB , TMS570LS3137-EP
- 1 Preface
- 2 Amplifiers
- 3 Audio
- 4 Clock and Timing
- 5 Data Converters
- 6 Interface
- 7 Isolation
- 8 Logic
- 9 Motor Drivers
- 10Microcontrollers
- 11Processors
-
12Power Management
- 12.1 Linear Regulators (LDO)
- 12.2 DC/DC Switching Regulators
- 12.3 Multi-channel ICs (PMIC)
- 12.4 Battery Management
- 12.5 Power Muxes
- 12.6 Low-side Switches
- 12.7 USB Power Switches and Charging Port Controllers
- 12.8 Offline and Isolated DC/DC Controllers and Converters
- 12.9 Gate Drivers
- 12.10 Voltage References
- 12.11 Supervisor and Reset IC
- 12.12 LED Driver
- 12.13 DDR Memory
- 12.14 Digital Power
- 13Sensors
- 14Switches and Multiplexers
- 15Important Notice
1 Preface
In 1994, a paradigm shift occurred within the defense community with the introduction of “Defense Acquisition Reform,” which had the objective to expand the consideration of commercial-off-the-shelf (COTS) components for defense equipment. In the years that followed both the avionics and defense industries were looking for viable approaches to procure COTS components while still ensuring that these components meet the critical performance, reliability and safety requirements their industries demanded. Texas Instrument’s enhanced product (-EP) plastic-encapsulated microcircuits (PEMs) portfolio is the solution. Beyond just meeting the reliability expectations for the PEMs semiconductors, we also complement this with extended device availability to match the expectation of the industry while enabling a low-cost portfolio for extensive use across these industries.
Our enhanced products portfolio mitigates the risks that the avionics and defense markets face with COTS integrated circuits (ICs) by:
- Using the latest and most robust plastic encapsulation methodology to support the harsh environment needs.
- Ensuring tin plating content is not above 97% to eliminate the risks related to time-dependent pin-to-pin metal shorts (aka tin whiskers) by assembling the device with NiPdAu plating or SnPb solder balls.
- Using only gold (Au) bond wires to ensure the highest quality die to leadframe connection.
- Performing extended 250 hours highly accelerated temperature and humidity stress testing (HAST) to demonstrate improved moisture resistance, extending both operational life and dormant storage capabilities.
- Extending temperature ranges from -55°C to 125°C to enable the broadest possible use cases.
- Ensuring a single controlled manufacturing baseline flow with a single wafer fab, assembly site and test site to ensure the applicability of customer’s qualification even over multi-decade programs.
- Ensuring orderable (V62/xxxx) DLA vendor items drawings part numbers that eliminate the need specification source controlled drawings.
| Enhanced Products New Device Qualification Matrix | ||||
|---|---|---|---|---|
| (Note that qualification by similarity (“qualification family”) per JEDEC JESD47 is allowed) | ||||
| Description | Condition | Sample Size (Allowed Rejects) |
Lots Required | Test Method |
| Electromigration | Maximum Recommended Operating Conditions | N/A | N/A | Per TI Design Rules |
| Wire Bond Life | Maximum Recommended Operating Conditions | N/A | N/A | Per TI Design Rules |
| Electrical Characterization | TI Data Sheet | 15 | 3 | N/A |
| Electrostatic Discharge Sensitivity | HBM | 3 units/voltage | N/A | EIA/JESD22-A114 or ANSI/ESDA/JEDEC JS-001 |
| CDM | EIA/JESD22-C101 or ANSI/ESDA/JEDEC JS-002 |
|||
| Latch-up | Per Technology | 3(0) | 1 | EIA/JESD78 |
| Physical Dimensions | TI Data Sheet | 5(0) | 1 | EIA/JESD22- B100 |
| Thermal Impedance | Theta-JA on board | Per Pin-Package | N/A | EIA/JESD51 |
| Bias Life Test | 125°C/1000 hours or equivalent | 45(0) | 3 | JESD22-A108* |
| Biased Humidity** or Biased HAST** |
85°C/85%/1000 hours | 77(0) | 3 | JESD22-A101* |
| 130°C/85%/96 hours or 110°C/85%/264 hours | JESD22-A110* | |||
| Extended Biased Humidity** or Extended Biased HAST** |
85°C/85%/2600 hours | 77(-) | 1 | JESD22-A101* |
| 130°C/85% /250 hours or 110°C/85%/687 hours | JESD22-A110* | |||
| Unbiased HAST | 130°C/85% /96 hours or 110°C/85%/264 hours | 77(0) | 3 | JESD22-A.118* |
| Temperature Cycle | -65°C to +150°C non-biased for 500 cycles | 77(0) | 3 | JESD22-A104* |
| Solder Heat | 260°C for 10 seconds | 22(0) | 1 | JESD22-B106 |
| Resistance to Solvents | Ink symbol only | 12(0) | 1 | JESD22-B107 |
| Solderability | Bake Preconditioning | 22(0) | 1 | ANSI/J-STD-002 |
| Flammability | Method A / Method B | 5(0) | 1 | UL94 |
| Bond Shear | Per wire size | 5 units x 30(0) bonds | 3 | JESD22-B116 |
| Bond Pull Strength | Per wire size | 5 units x 30(0) bonds | 3 | ASTM F-459 or TM2011 |
| Die Shear | Per die size | 5(0) | 3 | TM 2019 |
| High Temp Storage | 150°C / 1,000 hours | 15(0) | 3 | JESD22-A103* |
| Moisture Sensitivity | Surface Mount Only | 12 | 1 | J-STD-020* |
| *Precondition performed per
JEDEC Std. 22, Method A112/A113 **For information only |
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