SCES627D MARCH 2005 – October 2017 SN74AUP1G240
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Switching Characteristics: CL = 5 pF
- 6.7 Switching Characteristics: CL = 10 pF
- 6.8 Switching Characteristics: CL = 15 pF
- 6.9 Switching Characteristics: CL = 30 pF
- 6.10 Operating Characteristics
- 6.11 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
1 Features
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
(A114-B, Class II) - 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model
- Available in the Texas Instruments NanoStar™ Package
- Low Static-Power Consumption
- ICC = 0.9 µA Maximum
- Low Dynamic-Power Consumption
- Cpd = 4.2 pF at 3.3 V Typical
- Low Input Capacitance
- CI = 1.5 pF Typical
- Low Noise – Overshoot and Undershoot
<10% of VCC - Input-Disable Feature Allows Floating Input Conditions
- Ioff Supports Partial Power-Down-Mode Operation
- Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input
- Wide Operating VCC Range of 0.8 V to 3.6 V
- Optimized for 3.3-V Operation
- 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- tpd = 4.7 ns Maximum at 3.3 V
- Suitable for Point-to-Point Applications
2 Applications
- Grid infrastructure
- Telecom Infrastructure
- Medical, Healthcare, and Fitness
- Factory Automation and Control
- Printers and Other Peripherals
3 Description
The AUP family is TI's premier solution to the industry's low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family ).
This buffer/driver is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals.
To assure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| SN74AUP1G240DBV | SOT-23 (5) | 1.60 mm × 2.90 mm |
| SN74AUP1G240DCK | SC70 (5) | 1.25 mm × 2.00 mm |
| SN74AUP1G240DRY | SON (6) | 1.00 mm × 1.45 mm |
| SN74AUP1G240DSF | SON (6) | 1.00 mm × 1.00 mm |
| SN74AUP1G240YFP | DSBGA (6) | 0.76 mm × 1.16 mm |
| SN74AUP1G240YZP | DSBGA (5) | 0.89 mm × 1.39 mm |
| SN74AUP1G240DPW | X2SON (5) | 0.80 mm × 0.80 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Logic Diagram (Positive Logic)
