ZHCSC62D March 2014 – December 2017 UCC28630 , UCC28631 , UCC28632 , UCC28633 , UCC28634
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| START-UP CURRENT SOURCE | ||||||
| IVDD0 | VDD pin short-circuit charging current | VDD = 0.2 V, VHV = 100 V | 0.6 | 0.9 | 1.2 | mA |
| IVDD1 | VDD pin final charging current | VDD = 11.9 V, VHV = 100 V | 1.1 | 4.0 | 7.6 | mA |
| ILEAK | HV current source leakage current | VDD = 18 V, VHV = 100 V HV, current source off, TA = 25°C |
0.1 | 0.5 | μA | |
| SUPPLY VOLTAGE MONITORING | ||||||
| VDD(start) | VDD start-up voltage | VDD increasing | 13.00 | 14.75 | 16.50 | V |
| VDD(stop) | VDD minimum operating voltage after start-up | VDD decreasing after start-up | 7.3 | 8.0 | 8.5 | V |
| VDD(hyst) | VDD start – VDD stop level | 6.5 | V | |||
| VDD(reset) | VDD reset restart level | 3.5 | 5.0 | 6.5 | V | |
| VDD(ovp) | VDD over-voltage protection level | VDD increasing after start-up, UCC28630, UCC28631, UCC28632, UCC28633 | 16.5 | 17.5 | 18.3 | V |
| VDD increasing after start-up, UCC28634 only | 14.0 | 14.85 | 15.55 | V | ||
| IDD(run) | Supply current during normal operation | VSENSE = 0.45 V, CS = 0 V See (1) CLOAD = 700 pF on DRV | 6.0 | 9.0 | 13.0 | mA |
| IDD(sleep) | Supply current during sleep mode, between switching pulses | VSENSE = 8.0 V, VCS = 1.0 V, light-load mode at 200 Hz, TA = 25°C | 90 | 110 | μA | |
| OSCILLATOR | ||||||
| fSW(max) | Maximum switching frequency | VSENSE = 0.45 V, VCS = 0 V | 110 | 120 | 130 | kHz |
| fSW(min) | Minimum switching frequency | VSENSE = 8.0 V, VCS = 1.0 V, light-load mode | 0.18 | 0.20 | 0.22 | kHz |
| DMAX | Maximum Duty Cycle | VSENSE = 0.45 V, VCS = 0 V | 70% | |||
| tON(min) | Minimum On time | VSENSE = 8.0 V, VCS = 1.0 V, light-load mode | 550 | 600 | 650 | ns |
| fSW(dith) | Frequency dither range | Except UCC28632 | ± 6.7% | |||
| tDITH | Dither repetition period | Except UCC28632 | 6.0 | ms | ||
| SHUTDOWN (SD) PIN (EXTERNAL FAULT INPUT)(2) | ||||||
| IPULLUP | Internal pull-up current source | See (2), (3), (4) | 185 | 210 | 235 | µA |
| VTRIP(rise) | Fault ok level (rising) | See (2), (3), (4) , UCC28630, UCC28631, UCC28632,UCC28633 | 3.2 | 3.5 | 3.8 | V |
| See (2), (3), (4) , UCC28634 only | 2.2 | 2.5 | 2.8 | V | ||
| VTRIP(fall) | Fault trip level (falling) | See (2), (3), (4) | 1.7 | 2.00 | 2.3 | V |
| VTRIP(hyst) | See (2), (3), (4) | 1.5 | V | |||
| VWAKE(rise) | Wake-up level (rising) | See (2), (3), (4)Except UCC28633 | 1.8 | 2.2 | 2.6 | V |
| tWAKE | Wake delay time | Delay to first DRV pulse | 10 | µs | ||
| VSENSE Pin (MAGNETIC SENSE) | ||||||
| VOUT(ref) | Internal output voltage sense reference level | Required positive voltage at VSENSE pin during off-time (at 25°C) | 7.425 | 7.500 | 7.575 | V |
| tOUT(smp) | Vsense sample delay for VOUT | Measured w.r.t. DRV falling edge | 1.7 | µs | ||
| VOUT(ovp) | Internal output voltage sense OVP level | Measured w.r.t. regulation level, tracking | 120% | |||
| CURRENT SENSE (CS) Pin | ||||||
| VCS(max) | Peak CS pin voltage level | At maximum modulator demand | 800 | mV | ||
| VCS(min) | Peak CS pin voltage level | At minimum modulator demand | 172 | mV | ||
| VSLOPE | Slope compensation ramp | 30 | mV/µs | |||
| OVER TEMPERATURE PROTECTION | ||||||
| TEMPTRIP | Thermal protection shutdown temperature | Default internal setting, latch-off protection | 125 | °C | ||
| TEMPHYST | Thermal protection hysteresis | 10 | °C | |||
| GATE DRIVE OUTPUT (DRV) | ||||||
| ROH | High level source resistance | IOH = 100 mA | 22 | 35 | Ω | |
| ROL | Low level sink resistance | IOL = –100 mA | 1.2 | 2.5 | Ω | |