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ZHCSE23A January 2015 – August 2015 TPS7B4253-Q1

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

PWP|20
- MHTS001H
DDA|8
- MPDS092F

散熱焊盤機械數據 (封裝 | 引腳)

PWP|20
- PPTD410
DDA|8
- PPTD043J

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Unregulated input voltage	IN⁽²⁾⁽³⁾	–40	45	V
Enable input voltage	Enable input voltage⁽²⁾⁽³⁾	–40	45	V
Regulated output voltage	Regulated output voltage⁽²⁾⁽⁴⁾	–1	45	V
Voltage difference between the input and output	IN – OUT	–40	45	V
Reference voltage	ADJ⁽²⁾⁽³⁾	–0.3	45	V
Feedback input voltage for the tracker	FB⁽²⁾⁽³⁾	–1	45	V
Reference voltage minus the input voltage	ADJ – IN⁽⁵⁾		18	V
Operating junction temperature, T_J		–40	150	°C
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to the GND pin.

(3) Absolute maximum voltage.

(4) An internal diode is connected between the OUT and GND pins with 600-mA DC current capability for inductive clamp protection.

(5) The ADJ voltage cannot be 18 V higher than the IN voltage, otherwise the device can be damaged.

6.2 ESD Ratings

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per AEC Q100-002⁽¹⁾	NC pins	±2000	kV
		Human body model (HBM), per AEC Q100-002⁽¹⁾	All pins except for NC pins	±4000	kV
		Charged device model (CDM), per AEC Q100-011		±1000	kV

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
V_IN	Unregulated input voltage⁽²⁾	4	40	V
V_EN	Enable input voltage	0	40	V
V_ADJ	Adjust and enable input voltage	1.5	18	V
V_FB	Feedback input voltage for the tracker	1.5	18	V
V_OUT	Output voltage	1.5	40	V
C_(OUT)	Output capacitor requirements⁽³⁾	10	500	µF
	Output ESR requirements⁽⁴⁾	0.001	20	Ω
T_J	Operating junction temperature range	–40	150	°C

(1) Within the functional range the device operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related Electrical Characteristics table.

(2) V_IN > V_ADJ + V_(DROPOUT)

(3) The minimum output capacitance requirement is applicable for a worst-case capacitance tolerance of 30%, when a resistor divider is connected between the OUT and FB pins (the output voltage is higher than reference voltage), a 47-nF feedforward capacitor is required to be connected between the OUT and FB pins for loop stability, and the ESR range of the output capacitor is required to be from 0.001 to 10 Ω.

(4) Relevant ESR value at f = 10 kHz

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS7B4253-Q1		UNIT
		DDA (SO PowerPAD)	PWP (HTSSOP)
		8 PINS	20 PINS
R_θJA	Junction-to-ambient thermal resistance	45.4	45.9	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	51.1	29.2	°C/W
R_θJB	Junction-to-board thermal resistance	27.0	24.7	°C/W
ψ_JT	Junction-to-top characterization parameter	8.2	1.3	°C/W
ψ_JB	Junction-to-board characterization parameter	26.9	24.5	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	6.4	3.7	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

V_IN = 13.5 V, V_ADJ ≥ 1.5 V for HTSSOP, V_ADJ ≥ 2 V for SO PowerPAD, V_EN ≥ 2 V, T_J = –40ºC to 150ºC unless otherwise stated

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_I(UVLO)	IN undervoltage detection	V_IN rising			3.65	V
V_I(UVLO)	IN undervoltage detection	V_INfalling			2.8	V
ΔVO	Output voltage tracking accuracy⁽¹⁾	I_OUT = 100 µA to 300 mA, V_IN = 4 to 40 V V_ADJ < V_IN – 1 V 1.5 V < V_ADJ < 18 V for HTSSOP 2 V < V_ADJ < 18 V for SO PowerPAD	–4		4	mV
ΔV_O(ΔIO)	Load regulation steady-state	I_OUT = 0.1 to 300 mA, V_ADJ= 5 V			4	mV
ΔV_O(ΔVI)	Line regulation steady-state	I_OUT= 10 mA, V_IN = 6 to 40 V, V_ADJ = 5 V			4	mV
PSRR	Power supply ripple rejection	ƒ_rip = 100 Hz, V_rip = 0.5 V_PP, C_(OUT) = 10 µF, I_OUT = 100 mA		70		dB
V_(DROPOUT)	Dropout voltage (V_(DROPOUT) = V_IN – V_OUT)	I_OUT = 200 mA, V_IN = V_ADJ ≥ 4 V⁽²⁾		320	520	mV
I_O(lim)	Output current limitation	V_ADJ = 5 V, OUT short to GND	301	450	520	mA
I_R(IN)	Reverse current at IN	V_IN = 0 V, V_OUT = 40 V, V_ADJ = 5 V	–2		0	µA
I_R(–IN)	Reverse current at negative IN	V_IN = –40 V, V_OUT = 0 V, V_ADJ = 5 V	–10		0	µA
T_SD	Thermal shutdown temperature	T_J increases because of power dissipation generated by the IC		175		°C
T_{SD_hys}	Thermal shutdown hysteresis			15		°C
I_Q	Current consumption	4 V ≤ V_IN ≤ 40 V, V_ADJ = 0 V; V_EN = 0 V		2	4	µA
		4 V ≤ V_IN ≤ 40 V, V_EN ≥ 2 V, V_ADJ < 0.8 V		7	18
		4 V ≤ V_IN ≤ 40 V, I_OUT < 100 µA, V_ADJ = 5 V		60	100
		4 V ≤ V_IN ≤ 40 V, I_OUT < 300 mA, V_ADJ = 5V		350	400
I_Q(DROPOUT)	Current consumption in dropout region	V_IN = V_ADJ = 5 V, I_OUT = 100 µA		70	140	µA
I_I(ADJ)	Adjust input current	HTSSOP package, V_ADJ = V_FB = 5 V			0.5	µA
I_I(ADJ)	Adjust input current	SO PowerPAD package, V_ADJ = V_FB = 5 V			5.5	µA
V_{(ADJ_LOW)}	Adjust low signal valid	V_OUT = 0 V	0		0.8	V
V_{(ADJ_HIGH)}	Adjust high signal valid	\|V_OUT – V_ADJ\| < 5 mV	1.5		18	V
V_{(EN_LOW)}	Enable low signal valid	V_OUT = 0 V	0		0.7	V
V_{(EN_HIGH)}	Enable high Signal Valid	OUT settled	2		40	V
I_EN	Enable pulldown current	2V < V_EN < 40 V			5	µA
I_FB	FB bias current	V_ADJ = V_FB = 5 V			0.5	µA

(1) The tracking accuracy is specified when the FB pin is directly connected to the OUT pin which means V_ADJ = V_OUT, external resistor divider variance is not included.

(2) Measured when the output voltage, V_OUT has dropped 10 mV from the nominal value.

6.6 Typical Characteristics

V_IN = 14 V, V_ADJ = 5 V, V_FB = V_OUT, unless otherwise specified

Figure 1. Tracking Accuracy vs Ambient Temperature

Figure 3. Load Regulation

V_IN = V_ADJ = 4 V

I_OUT = 200 mA

Figure 5. Dropout Voltage vs Ambient Temperature

Figure 7. Shutdown Current vs Ambient Temperature

Figure 9. Quiescent Current vs Ambient Temperature

C_(OUT) = 10 µF	I_OUT = 1 mA	T_A = 25°C

Figure 11. PSRR

V_FB = V_OUT

Figure 13. ESR Stability vs Load Capacitance

Figure 15. ESR Stability vs Load Capacitance (Multiple Output Capacitors)

TPS7B4253-Q1 transient_6-40V_line_100mA_falling_slvscp3.gif

V_IN = 40 to 6 V	V_ADJ = 5 V	C_(OUT) = 10 µF
I_OUT = 100 mA, 20 µs/div

Figure 17. 40- to 6-V Line Transient

TPS7B4253-Q1 transient_6-40V_line_10mA_falling_slvscp3.gif

V_IN = 40 to 6 V	V_ADJ = 5 V	C_(OUT) = 10 µF
I_OUT = 10 mA, 20 µs/div

Figure 19. 40- to 6-V Line Transient

TPS7B4253-Q1 transient_10-100mA_load_falling_slvscp3.gif

	V_IN = 14 V	V_ADJ = 5 V	C_(OUT) = 10 µF
	I_OUT = 100 to 10 mA, 40 µs/div

Figure 21. 100- to 10-mA Load Transient

Figure 2. Line Regulation

V_IN = V_ADJ = 4 V

Figure 4. Dropout Voltage vs Output Current

Figure 6. Current Limit (I_O(lim)) vs Ambient Temperature

Figure 8. Quiescent Current vs Output Current

V_ADJ = V_EN = 5 V

Figure 10. Quiescent Current vs Input Voltage

C_(OUT) = 10 µF	I_OUT = 100 mA	T_A = 25°C

Figure 12. PSRR

V_FB < V_OUT

Figure 14. ESR Stability vs Load Capacitance

TPS7B4253-Q1 transient_6-40V_line_100mA_rising_slvscp3.gif

V_IN = 6 to 40 V	V_ADJ = 5 V	C_(OUT) = 10 µF
I_OUT = 100 mA, 20 µs/div

Figure 16. 6- to 40-V Line Transient

TPS7B4253-Q1 transient_6-40V_line_10mA_rising_slvscp3.gif

V_IN = 6 to 40 V	V_ADJ = 5 V	C_(OUT) = 10 µF
I_OUT = 10 mA, 20 µs/div

Figure 18. 6- to 40-V Line Transient

TPS7B4253-Q1 transient_10-100mA_load_rising_slvscp3.gif

V_IN = 14 V	V_ADJ = 5 V	C_(OUT) = 10 µF
I_OUT = 10 to 100 mA, 40 µs/div

Figure 20. 10- to 100-mA Load Transient