ZHCSJG2A March 2019 – September 2019 TPS7A78
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VUVLO_SCIN | UVLO_SCIN threshold rising | VSCIN rising, VLDO_OUT(nom) ≤ 3.4 V | 17 | V | ||
| VUVLO_LDO_IN | UVLO_LDO_IN threshold rising | VSCIN rising | 3.9 | V | ||
| UVLO_LDO_IN threshold falling | VSCIN falling | 3.5 | V | |||
| ΔVLDO_OUT(ΔIOUT) | Load regulation | 0 mA ≤ IOUT ≤ 120 mA | 0.21 | mV/mA | ||
| VLDO_OUT | Output voltage accuracy | VSCIN(1)(3) = 4 (VLDO_OUT (nom) + 0.6 V) + 3 V, 0 mA ≤ IOUT ≤ 120 mA | –2 | 1 | 2 | % |
| ICL | Output current limit | VLDO_OUT = 0.9 x VLDO_OUT(nom) | 145 | 215 | 300 | mA |
| IDD_SCIN | SCIN pin quiescent current | VLDO_OUT(nom) = 3.3 V, IOUT = 0 mA, no R3, R4 | 280 | µA | ||
| VRipple | Output voltage ripple | VAC = 120 V, 60 Hz, FB, CS = 1.0 µF, CSCIN = 180 µF, VLDO_OUT(nom) = 5 V, IOUT = 10 mA, scope BW = 10 MHz | 3 | mV | ||
| VIT(PFD,RISING) | PFD pin rising threshold | VPFD rising, R4 = 100 kΩ | 1.24 | 1.42 | V | |
| VIT(PFD,FALLING) | PFD pin falling threshold | VPFD falling, R4 = 100 kΩ | 1.17 | 1.25 | ||
| VHYS(PFD) | PFD pin hysteresis | 110 | mV | |||
| VIT(PG,RISING) | PG pin rising threshold | R3 = 100 kΩ, VSCIN rising | 90.16 | 92 | 93.84 | %VLDO_OUT |
| VIT(PG,FALLING) | PG pin falling threshold | R3 = 100 kΩ | 88.5 | 90 | 91.5 | |
| VHYS(PG) | PG pin hysteresis | 2 | ||||
| VOL(PF),(PG) | PF and PG pins low-level ouput voltage | IPF,PG = 500 µA | 0.2 | V | ||
| ILKG(PF),(PG) | PF and PG pins open-drain leakage current | VPF,PG = 5 V | 50 | nA | ||
| TSD(Shutdown) | Thermal shutdown temperature | Shutdown, temperature increasing | 162 | ℃ | ||
| TSD(Reset) | Thermal shutdown reset temperature | Reset, temperature decreasing | 135 | |||