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SLVSAP3D December 2010 – February 2016 TPS57140-Q1

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

DGQ|10
- MPDS043F
DRC|10
- MPDS117L

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

DGQ|10
- PPTD325B
DRC|10
- QFND013N

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating temperature range (unless otherwise noted)⁽¹⁾

				MIN	MAX	UNIT
V_IN	Input voltage	VIN		–0.3	47	V
		EN⁽²⁾		–0.3	5
		BOOT			55
		VSENSE		–0.3	3
		COMP		–0.3	3
		PWRGD		–0.3	6
		SS/TR		–0.3	3
		RT/CLK		–0.3	3.6
V_OUT	Output voltage	PH to BOOT			8	V
		PH	DC voltage	–0.6	47
			200 ns	–1	47
			30 ns	–2	47
			DC voltage, T_J = –40°C	–0.85	47
V_DIFF	Differential voltage	PAD to GND		–200	200	mV
I_SOURCE	Source current	EN			100	μA
		BOOT			100	mA
		VSENSE			10	μA
		PH		Current limit
		RT/CLK			100	μA
I_SINK	Sink current	VIN		Current limit
		COMP			100	μA
		PWRGD			10	mA
		SS/TR			200	μA
T_J	Operating junction temperature			–40	150	°C
T_stg	Storage temperature			–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) See Enable and Adjusting Undervoltage Lockout (UVLO) for details.

6.2 ESD Ratings

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾		±2000	V
		Charged-device model (CDM), per AEC Q100-011	All pins	±500
		Charged-device model (CDM), per AEC Q100-011	Corner pins (1, 5, 6, and 10)	±750

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

	MIN	MAX	UNIT
VIN supply voltage	3.5	42	V
Output voltage for adjustable voltage	0.8	VIN	V
Output current capability		1.5	A
Effective input capacitance	3		µF
Operating ambient temperature, T_A	–40	125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾⁽²⁾		TPS57140-Q1		UNIT
		DGQ (MSOP-PowerPAD)	DRC (VSON)
		10 PINS	10 PINS
R_θJA	Junction-to-ambient thermal resistance (standard board)	67.4	45.2	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	46.7	52.1	°C/W
R_θJB	Junction-to-board thermal resistance	38.4	20.6	°C/W
ψ_JT	Junction-to-top characterization parameter	1.9	0.9	°C/W
ψ_JB	Junction-to-board characterization parameter	38.1	20.8	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	15.9	5.2	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

(2) Power rating at a specific ambient temperature T_A should be determined with a junction temperature of 150°C. This is the point where distortion starts to increase substantially. See the Power Dissipation Estimate section for more information.

6.5 Electrical Characteristics

T_J = –40°C to 150°C, VIN = 3.5 to 42 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (VIN PIN)
	Operating input voltage		3.5		42	V
	Internal undervoltage lockout threshold	No voltage hysteresis, rising and falling		2.5		V
	Shutdown supply current	EN = 0 V, 25°C, 3.5 V ≤ V_IN ≤ 60 V		1.5	4	μA
	Shutdown supply current	EN = 0 V, 125°C, 3.5 V ≤ V_IN ≤ 60 V		1.9	6.5	μA
	Operating: nonswitching supply current	V_SENSE = 0.83 V, V_IN = 12 V, 25°C		116	136	μA
ENABLE AND UVLO (EN PIN)
	Enable threshold voltage	No voltage hysteresis, rising and falling, 25°C	1.15	1.25	1.36	V
	Input current	Enable threshold 50 mV		–3.8		μA
	Input current	Enable threshold –50 mV		–0.9		μA
	Hysteresis current			–2.9		μA
VOLTAGE REFERENCE
	Voltage reference		0.792	0.8	0.808	V
HIGH-SIDE MOSFET
	On-resistance	V_IN = 3.5 V, BOOT-PH = 3 V		300		mΩ
	On-resistance	V_IN = 12 V, BOOT-PH = 6 V		200	410	mΩ
ERROR AMPLIFIER
	Input current			50		nA
	Error amplifier transconductance (gm)	–2 μA < I_COMP < 2 μA, V_COMP = 1 V		97		μMhos
	Error amplifier transconductance (gm) during slow start	–2 μA < I_COMP < 2 μA, V_COMP = 1 V, V_VSENSE = 0.4 V		26		μMhos
	Error amplifier dc gain	V_VSENSE = 0.8 V		10 000		V/V
	Error amplifier bandwidth			2700		kHz
	Error amplifier source/sink	V_(COMP) = 1 V, 100-mV overdrive		±7		μA
	COMP to switch current transconductance			6		A/V
CURRENT LIMIT
	Current-limit threshold	V_IN = 12 V, T_J = 25°C	1.8	2.7		A
THERMAL SHUTDOWN
	Thermal shutdown			182		°C
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
	Switching-frequency range using RT mode	V_IN = 12 V	100		2500	kHz
f_SW	Switching frequency	V_IN = 12 V, R_T = 200 kΩ	450	581	720	kHz
	Switching-frequency range using CLK mode	V_IN = 12 V	300		2200	kHz
	Minimum CLK pulse duration			40		ns
	RT/CLK high threshold	V_IN = 12 V		1.9	2.2	V
	RT/CLK low threshold	V_IN = 12 V	0.45	0.7		V
	RT/CLK falling-edge to PH rising-edge delay	Measured at 500 kHz with RT resistor in series		60		ns
	PLL lock in time	Measured at 500 kHz		100		μs
SLOW START AND TRACKING (SS/TR)
	Charge current	V_SS/TR = 0.4 V		2		μA
	SS/TR-to-VSENSE matching	V_SS/TR = 0.4 V		45		mV
	SS/TR-to-reference crossover	98% nominal		1		V
	SS/TR discharge current (overload)	V_SENSE = 0 V, V_(SS/TR) = 0.4 V		112		μA
	SS/TR discharge voltage	V_SENSE = 0 V		54		mV
POWER GOOD (PWRGD PIN)
PWRGD_TH	PWRGD switching threshold as % of the nominal VSENSE	V_SENSE falling (fault)		92		% of V_SENSE
		V_SENSE rising (good)		94
		V_SENSE rising (fault)		109
		V_SENSE falling (good)		107
	Hysteresis	V_SENSE falling and rising		2		% of V_SENSE
	Output-high leakage	V_SENSE = V_REF, V_(PWRGD) = 5.5 V, 25°C		10		nA
	On-resistance	I_(PWRGD) = 3 mA, V_SENSE < 0.79 V		50		Ω
	Minimum VIN for defined output	V_(PWRGD) < 0.5 V, I_I(PWRGD) = 100 μA		0.95	1.5	V