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ZHCSBZ0D November 2013 – January 2017 TPS54361

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

DPR|10
- MPSS046C

散熱焊盤機械數據 (封裝 | 引腳)

DPR|10
- QFND434A

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

		MIN	MAX	UNIT
Voltage	VIN	–0.3	65	V
	EN	–0.3	8.4
	FB	–0.3	3
	COMP	–0.3	3
	PWRGD	–0.3	6
	SS/TR	–0.3	3
	RT/CLK	–0.3	3.6
	BOOT-SW	–0.3	8
	SW	–0.6	65
	SW, 5-ns Transient	–7	65
	SW, 10-ns Transient	–2	65
Operating junction temperature		–40	150	°C
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_IN	Supply input voltage	4.5	60	V
V_O	Output voltage	0.8	58.8	V
I_O	Output current	0	3.5	A
T_J	Junction Temperature	–40	150	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾ ⁽²⁾		TPS54361	UNIT
		DPR (WSON)
		10 PINS
R_θJA	Junction-to-ambient thermal resistance (standard board)	35.1	°C/W
ψ_JT	Junction-to-top characterization parameter	0.3	°C/W
ψ_JB	Junction-to-board characterization parameter	12.5	°C/W
R_θJC(top)	Junction-to-case(top) thermal resistance	34.1	°C/W
R_θJC(bot)	Junction-to-case(bottom) thermal resistance	2.2	°C/W
R_θJB	Junction-to-board thermal resistance	12.3	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

(2) Power rating at a specific ambient temperature T_A must be determined with a junction temperature of 150°C. This is the point where distortion starts to substantially increase. See the power dissipation estimate in Power Dissipation Estimate for more information.

6.5 Electrical Characteristics

T_J = –40°C to 150°C, VIN = 4.5 V to 60 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (VIN PIN)
	Operating input voltage		4.5		60	V
	Internal undervoltage lockout threshold	Rising	4.1	4.3	4.48	V
	Internal undervoltage lockout threshold hysteresis			325		mV
	Shutdown supply current	EN = 0 V, 25°C, 4.5 V ≤ VIN ≤ 60 V		2.25	4.5	μA
	Operating: nonswitching supply current	FB = 0.9 V, T_A = 25°C		152	200	μA
ENABLE AND UVLO (EN PIN)
	Enable threshold voltage	No voltage hysteresis, rising and falling	1.1	1.2	1.3	V
	Input current	Enable threshold +50 mV		–4.6		μA
	Input current	Enable threshold –50 mV	–0.58	–1.2	–1.8	μA
	Hysteresis current		–2.2	–3.4	–4.5	μA
VOLTAGE REFERENCE
	Voltage reference		0.792	0.8	0.808	V
HIGH-SIDE MOSFET
	ON-resistance	VIN = 12 V, BOOT-SW = 6 V		89	190	mΩ
ERROR AMPLIFIER
	Input current			50		nA
	Error amplifier transconductance (gm)	–2 μA < I_COMP < 2 μA, V_COMP = 1 V		350		μS
	Error amplifier transconductance (gm) during soft start	–2 μA < I_COMP < 2 μA, V_COMP = 1 V, V_FB = 0.4 V		77		μS
	Error amplifier DC gain	V_FB = 0.8 V		10 000		V/V
	Min unity gain bandwidth			2500		kHz
	Error amplifier source/sink	V_(COMP) = 1 V, 100-mV overdrive		±30		μA
	COMP to SW current transconductance			12		A/V
CURRENT LIMIT
	Current limit threshold	All VIN and temperatures, open loop⁽¹⁾	4.5	5.5	6.8	A
		All temperatures, VIN = 12 V, open loop⁽¹⁾	4.5	5.5	6.3
		VIN = 12 V, T_A = 25°C, open loop⁽¹⁾	5.2	5.5	5.9
THERMAL SHUTDOWN
	Thermal shutdown			176		°C
	Thermal shutdown hysteresis			12		°C
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
	RT/CLK high threshold			1.55	2	V
	RT/CLK low threshold		0.5	1.2		V
SOFT START AND TRACKING (SS/TR PIN)
	Charge current	V_SS/TR = 0.4 V		1.7		µA
	SS/TR-to-FB matching	V_SS/TR = 0.4 V		42		mV
	SS/TR-to-reference crossover	98% nominal		1.16		V
	SS/TR discharge current (overload)	FB = 0 V, V_SS/TR = 0.4 V		354		µA
	SS/TR discharge voltage	FB = 0 V		54		mV
POWER GOOD (PWRGD PIN)
	FB threshold for PWRGD low	FB falling		90%
	FB threshold for PWRGD high	FB rising		93%
	FB threshold for PWRGD low	FB rising		108%
	FB threshold for PWRGD high	FB falling		106%
	Hysteresis	FB falling		2.5%
	Output high leakage	V_PWRGD = 5.5 V, T_A = 25°C		10		nA
	ON-resistance	I_PWRGD = 3 mA, V_FB < 0.79 V		45		Ω
	Minimum VIN for defined output	V_PWRGD < 0.5 V, I_PWRGD = 100 µA		0.9	2	V

(1) Open Loop current limit measured directly at the SW pin and is independent of the inductor value and slope compensation.

6.6 Timing Requirements

T_J = –40°C to 150°C, V_IN = 4.5 V to 60 V (unless otherwise noted)

		MIN	NOM	MAX	UNIT
RT/CLK
Minimum CLK input pulse width			15		ns

6.7 Switching Characteristics

T_J = –40°C to 150°C, V_IN = 4.5 V to 60 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SW
t_on	Minimum ON-time	V_IN = 23.7 V, V_OUT = 5 V, I_OUT= 3.5 A, R_T = 39.6 kΩ, T_A = 25°C		100		ns
CURRENT LIMIT
	Current limit threshold delay			60		ns
RT/CLK
	Switching frequency range using RT mode		100		2500	kHz
ƒ_SW	Switching frequency	R_T = 200 kΩ	450	500	550	kHz
	Switching frequency range using CLK mode		160		2300	kHz
	RT/CLK falling edge to SW rising edge delay	Measured at 500 kHz with an RT resistor in series		55		ns
	PLL lock-in time	Measured at 500 kHz		78		μs
ERROR AMPLIFIER
	Enable to COMP active	V_IN = 12 V, T_A = 25°C		540		µs