ZHCSE34A August 2015 – August 2015
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1
Simple eFuse Protection for Set Top Boxes
- 9.2.1.1 Design Requirements
- 9.2.1.2 Detailed Design Procedure
- 9.2.1.3 Application Curves
- 9.2.1
Simple eFuse Protection for Set Top Boxes
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
7 Specifications
7.1 Absolute Maximum Ratings
over operating temperature range (unless otherwise noted) (1) (2)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage(1) | VIN | –0.3 | 20 | V |
| VIN (Transient < 1 ms) | 22 | |||
| Output voltage | OUT | –0.3 | VIN + 0.3 | V |
| OUT (Transient < 1 µs) | -1.2 | V | ||
| Voltage | ILIM | –0.3 | 7 | V |
| Continuous output current | 6.25(3) | A | ||
| Voltage | EN/UVLO | –0.3 | 7 | V |
| Voltage | dV/dT | –0.3 | 7 | V |
| Storage temperature, Tstg | -65 | 150 | °C | |
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to network ground terminal.
(3) Device supports high peak current during short circuit conditions until current is internally limited.
7.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
| Charged device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|
| Input voltage | VIN (TPS25926x) | 4.5 | 12 | 13.8 | V |
| VIN (TPS25925x) | 4.5 | 5 | 5.5 | ||
| dV/dT, EN/UVLO | 0 | 6 | |||
| ILIM | 0 | 3 | |||
| Continuous output current | IOUT | 0 | 5 | A | |
| Resistance | ILIM | 10 | 100 | 162 | kΩ |
| External capacitance | OUT | 0.1 | 1 | 1000 | µF |
| dV/dT | 1 | 1000 | nF | ||
| Operating junction temperature range, TJ | –40 | 25 | 125 | °C | |
| Operating Ambient temperature range, TA | –40 | 25 | 85 | °C | |
7.4 Thermal Information(1)
over operating free-air temperature range (unless otherwise noted)| THERMAL METRIC | TPS25925x/6x | UNIT | |
|---|---|---|---|
| DRC (VSON) | |||
| 10 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 45.9 | °C/W |
| RθJCtop | Junction-to-case (top) thermal resistance | 53 | |
| RθJB | Junction-to-board thermal resistance | 21.2 | |
| ψJT | Junction-to-top characterization parameter | 1.2 | |
| ψJB | Junction-to-board characterization parameter | 21.4 | |
| RθJCbot | Junction-to-case (bottom) thermal resistance | 5.9 | |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
7.5 Electrical Characteristics
–40°C ≤ TJ ≤ 125°C, VIN = 12 V for TPS25926x, VIN = 5 V for TPS25925x, VEN /UVLO = 2 V, RILIM = 100 kΩ, CdVdT = OPEN. All voltages referenced to GND (unless otherwise noted).| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VIN (INPUT SUPPLY) | ||||||
| VUVR | UVLO threshold, rising | 4.15 | 4.3 | 4.45 | V | |
| VUVhyst | UVLO hysteresis(1) | 5% | ||||
| IQON | Supply current | Enabled: EN/UVLO = 2 V, TPS25926x | 0.3 | 0.47 | 0.55 | mA |
| Enabled: EN/UVLO = 2 V, TPS25925x | 0.35 | 0.42 | 0.6 | mA | ||
| IQOFF | EN/UVLO = 0 V | 0.13 | 0.225 | mA | ||
| VOVC | Over-voltage clamp | VIN > 16.5 V, IOUT = 10 mA, TPS25926x | 13.8 | 15 | 16.5 | V |
| VIN > 6.75 V, IOUT = 10 mA, –40℃ ≤ TJ ≤ 85℃, TPS25925x |
5.5 | 6.1 | 6.75 | |||
| VIN > 6.75 V, IOUT = 10 mA, –40℃ ≤ TJ ≤ 125℃, TPS25925x |
5.25 | 6.1 | 6.75 | |||
| EN/UVLO (ENABLE/UVLO INPUT) | ||||||
| VENR | EN Threshold voltage, rising | 1.37 | 1.4 | 1.44 | V | |
| VENF | EN Threshold voltage, falling | 1.32 | 1.35 | 1.39 | V | |
| IEN | EN Input leakage current | 0 V ≤ VEN ≤ 5 V | –100 | 0 | 100 | nA |
| dV/dT (OUTPUT RAMP CONTROL) | ||||||
| IdVdT | dV/dT Charging current(1) | VdVdT = 0 V | 220 | nA | ||
| RdVdT_disch | dV/dT Discharging resistance | EN/UVLO = 0 V, IdVdT = 10 mA sinking | 50 | 73 | 100 | Ω |
| VdVdTmax | dV/dT Max capacitor voltage(1) | 5.5 | V | |||
| GAINdVdT | dV/dT to OUT gain(1) | ΔVdVdT | 4.85 | V/V | ||
| ILIM (CURRENT LIMIT PROGRAMMING) | ||||||
| IILIM | ILIM Bias current(1) | 10 | µA | |||
| IOL | Overload current limit(2) | RILIM = 45.3 kΩ, VVIN-OUT = 1 V | 1.75 | 2.1 | 2.45 | A |
| RILIM = 100 kΩ, VVIN-OUT = 1 V | 3.4 | 3.75 | 4.05 | |||
| RILIM = 150 kΩ, VVIN-OUT = 1 V | 4.5 | 5.1 | 5.7 | |||
| IOL-R-Short | RILIM = 0 Ω, Shorted Resistor Current Limit (Single Point Failure Test: UL60950)(1) | 0.84 | A | |||
| IOL-R-Open | RILIM = OPEN, Open Resistor Current Limit (Single Point Failure Test: UL60950)(1) | 0.73 | A | |||
| ISCL | Short-circuit current limit(2) | RILIM = 45.3 kΩ, VVIN-OUT = 5 V, TPS25925x | 1.72 | 2.05 | 2.42 | A |
| RILIM = 45.3 kΩ, VVIN-OUT = 12 V, TPS25926x | 1.62 | 1.98 | 2.37 | |||
| RILIM = 100 kΩ, VVIN-OUT = 5 V, TPS25925x | 3.1 | 3.56 | 4.0 | |||
| RILIM = 100 kΩ, VVIN-OUT = 12 V, TPS25926x | 2.9 | 3.32 | 3.85 | |||
| RILIM = 150 kΩ, VVIN-OUT = 5 V, TPS25925x | 4.22 | 4.95 | 5.69 | |||
| RILIM = 150 kΩ, VVIN-OUT = 12 V, TPS25926x | 3.7 | 4.5 | 5.5 | |||
| RATIOFASTRIP | Fast-Trip comparator level w.r.t. overload current limit(1) | IFASTRIP : IOL | 160% | |||
| VOpenILIM | ILIM Open resistor detect threshold(1) | VILIM Rising, RILIM = OPEN | 3.1 | V | ||
| OUT (PASS FET OUTPUT) | ||||||
| TON | Turn-on delay(1) | EN/UVLO → H to IVIN = 100 mA, 1-A resistive load at OUT | 220 | µs | ||
| RDS(on) | FET ON resistance | TJ = 25°C | 21 | 30 | 39 | mΩ |
| TJ = 125°C | 40 | 50 | ||||
| IOUT-OFF-LKG | OUT Bias current in off state | VEN/UVLO = 0 V, VOUT = 0 V (Sourcing) | –5 | 0 | 1.2 | µA |
| IOUT-OFF-SINK | VEN/UVLO = 0V, VOUT = 300 mV (Sinking) | 10 | 15 | 20 | ||
| THERMAL SHUT DOWN (TSD) | ||||||
| TSHDN | TSD Threshold, rising(1) | 150 | °C | |||
| TSHDNhyst | TSD Hysteresis(1) | 10 | °C | |||
| Thermal fault: latched or autoretry | TPS259250, TPS259260 | LATCHED | ||||
| TPS259251, TPS259261 | AUTO-RETRY | |||||
(1) These parameters are provided for reference only and do not constitute part of TI's published device specifications for purposes of TI's product warranty.
(2) Pulsed testing techniques used during this test maintain junction temperature approximately equal to ambient temperature.
7.6 Timing Requirements
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tOFFdly | Turn Off delay(1) | EN↓ | 0.4 | µs | ||
| dV/dT (OUTPUT RAMP CONTROL) | ||||||
| tdVdT | Output ramp time | TPS25926x, EN/UVLO → H to OUT = 11.7 V, CdVdT = 0 | 0.7 | 1 | 1.3 | ms |
| TPS25925x, EN/UVLO → H to OUT = 4.9 V, CdVdT = 0 | 0.28 | 0.4 | 0.52 | |||
| TPS25926x, EN/UVLO → H to OUT = 11.7 V, CdVdT = 1 nF(1) |
12 | |||||
| TPS25925x, EN/UVLO → H to OUT = 4.9 V, CdVdT = 1 nF(1) |
5 | |||||
| ILIM (CURRENT LIMIT PROGRAMMING) | ||||||
| tFastOffDly | Fast-Trip comparator delay(1) | IOUT > IFASTRIP to IOUT= 0 (Switch Off) | 300 | ns | ||
| THERMAL SHUTDOWN (TSD) | ||||||
| tTSDdly | Retry Delay after TSD Recovery, TJ < [TSHDN - 10oC](1) | At VIN = 5 V, TPS259251 and TPS259261 | 110 | ms | ||
| At VIN = 12 V, TPS259251 and TPS259261 | 145 | |||||
(1) These parameters are provided for reference only and do not constitute part of TI's published device specifications for purposes of TI's product warranty.
7.7 Typical Characteristics
TJ = 25°C, VVIN = 12 V for TPS25926x, VVIN = 5 V for TPS25925x, VEN/UVLO = 2 V, RILIM = 100 kΩ, CVIN = 0.1 µF, COUT = 1µF, CdVdT = OPEN (unless stated otherwise)
| TPS25926x | ||
| TPS25926x | ||
| TPS25926x | ||
| RILIM = 0Ω | ||
| RILIM = 150 kΩ | ||
| RILIM = 150 kΩ | ||
| RILIM = 45.3 kΩ | ||
| TPS25926x, CdVdT = OPEN, COUT = 4.7 µF |
| TPS25926x | ||
| TPS259251/61, VVIN = 5 V |
| TPS25925x/6x, VVIN = 5 V, RILIM = 150 kΩ |
| TPS259251/61 , VVIN = 5 V |
| TPS25926x , VVIN = 12 V, RILIM = 150 kΩ |
| TPS25926x, VVIN = 12 V | ||
| TPS25926x, VVIN = 12 V | ||
| TPS25925x | ||
| TPS25925x | ||
| TPS25925x | ||
| RILIM = OPEN | ||
| RILIM = 100 kΩ | ||
| RILIM = 45.3 kΩ | ||
| RILIM = 100 kΩ | ||
| TPS25925x, CdVdT = OPEN, COUT= 4.7 µF |
| TPS25925x | ||
| TPS259250/60 , VVIN = 5 V |
| TPS25925x/6x, VVIN = 5 V, RILIM = 150 kΩ |
| TPS259251/61 , VVIN = 5 V, CdVdT = 1nF |
| TPS25926x, VVIN = 12 V, CdVdT = 1 nF | ||
| ILOAD stepped From 65% to 125%, back to 65% |