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SBOS371B August 2006 – October 2014 TMP401

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

DGK|8
- MPDS028E

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購(gòu)信息

6 Specifications

6.1 Absolute Maximum Ratings⁽¹⁾

	MIN	MAX	UNIT
Power supply, V+		7.0	V
Input and output voltage⁽²⁾	–0.5	(V+) + (0.5)	V
Input current		10	mA
Operating temperature range	–55	+125	°C
Junction Temperature (T_J max)		+150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Input voltage rating applies to all TMP401 input and output pins.

6.2 Handling Ratings

			MIN	MAX	UNIT
T_stg	Storage temperature range		–60	+130	°C
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	–3000	3000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	–1000	1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

		MIN	NOM	MAX	UNIT
V+	Positive supply (3 V to 5.5 V)		5		V
T_A	Ambient temperature		25		°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		TMP401	UNIT
		DGK (VSSOP)
		8 PINS
R_θJA	Junction-to-ambient thermal resistance	78.8	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	71.6
R_θJB	Junction-to-board thermal resistance	68.2
ψ_JT	Junction-to-top characterization parameter	22.0
ψ_JB	Junction-to-board characterization parameter	67.6
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	N/A

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics: V+ = 3 V to 5.5 V

At T_A = –40°C to +125°C, and V+ = 3 V to 5.5 V, unless otherwise noted.

PARAMETER			TEST CONDITIONS	MIN	TYP	MAX	UNIT
TEMPERATURE ERROR
TE_LOCAL	Local temperature sensor		T_A = –40°C to +125°C		±1	±3	°C
TE_REMOTE	Remote temperature sensor⁽¹⁾		T_A = +15°C to +75°C, T_REMOTE = –40°C to +150°C, V+ = 3.3 V			±1	°C
			T_A = –40°C to +100°C, T_REMOTE = –40°C to +150°C, V+ = 3.3 V			±3	°C
			T_A = –40°C to +125°C, T_REMOTE = –40°C to +150°C			±5	°C
	TE_LOCAL and TE_REMOTE versus supply		V+ = 3 V to 5.5 V		±0.2	±0.5	°C/V
TEMPERATURE MEASUREMENT
	Conversion time (per channel)		One-shot mode		115		ms
	Resolution	TE_LOCAL (programmable)		9		12	Bits
	Resolution	TE_REMOTE			12		Bits
	Remote sensor source currents	High	Series resistance, 3 kΩ max		120		µA
		Medium high			60		µA
		Medium low			12		µA
		Low			6		µA
η	Remote transistor ideality factor		TMP401 optimized ideality factor		1.008
SMBus INTERFACE
V_IH	Logic input high voltage (SCL, SDA)			2.1			V
V_IL	Logic input low voltage (SCL, SDA)					0.8	V
	Hysteresis				500		mV
	SMBus output low sink current			6			mA
	Logic input current			–1		+1	µA
	SMBus input capacitance (SCL, SDA)				3		pF
	SMBus timeout				30	35	ms
DIGITAL OUTPUTS
V_OL	Output low voltage		I_OUT = 6 mA		0.15	0.4	V
I_OH	High-level output leakage current		V_OUT = V+		0.1	1	µA
	ALERT/THERM2 output low sink current		ALERT/THERM2 forced to 0.4 V	6			mA
	THERM output low sink current		THERM forced to 0.4 V	6			mA
POWER SUPPLY
V+	Specified voltage range			3		5.5	V
I_Q	Quiescent current		0.0625 conversions per second		29	36	µA
			8 conversions per second		390	450	µA
			Serial bus inactive, shutdown mode		3	10	µA
			Serial bus active, f_S = 400 kHz, shutdown mode		90		µA
			Serial bus active, f_S = 2.5 MHz, shutdown mode		350		µA
UVLO	Undervoltage lock out			2.3	2.4	2.6	V
POR	Power-on reset threshold				1.6	2.3	V
TEMPERATURE RANGE
	Specified range			–40		+125	°C
	Storage range			–60		+130	°C
θ_JA	Thermal resistance, VSSOP-8				150		°C/W

(1) Tested with less than 5-Ω effective series resistance and 100-pF differential input capacitance.

6.6 Timing Requirements

See the Timing Diagrams section for timing diagrams.

PARAMETER		FAST MODE		HIGH-SPEED MODE		UNIT
PARAMETER		MIN	MAX	MIN	MAX	UNIT
f_(SCL)	SCL operating frequency	0.001	0.4	0.001	2.5	MHz
t_(BUF)	Bus free time between stop and start condition	600		160		ns
t_(HDSTA)	Hold time after repeated start condition. After this period, the first clock is generated.	600		160		ns
t_(SUSTA)	Repeated start condition setup time	600		160		ns
t_(SUSTO)	Stop condition setup time	600		160		ns
t_(HDDAT)	Data hold time	100		80		ns
t_(SUDAT)	Data setup time	100		60		ns
t_(LOW)	SCL clock low period	1300		260		ns
t_(HIGH)	SCL clock high period	600		60		ns
	Clock rise and fall time		300		40	ns
t_F	Data fall time		300		120	ns
t_R	Data rise time for SCL ≤ 100 kHz		300			ns
t_R	Data rise time for SCL ≤ 100 kHz		1000			ns