ZHCSI62J August 2018 – February 2024 TLV9051 , TLV9052 , TLV9054
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| OFFSET VOLTAGE | ||||||
| VOS | Input offset voltage | VS = 5 V | ±0.33 | ±1.6 | mV | |
| VS = 5 V, TA = –40°C to +125°C | ±2 | |||||
| dVOS/dT | Drift | VS = 5 V, TA = –40°C to +125°C | ±0.5 | μV/°C | ||
| PSRR | Power-supply rejection ratio | VS = 1.8 V – 5.5 V, VCM = (V–) | ±13 | ±80 | μV/V | |
| Channel separation, dc | At dc | 115 | dB | |||
| INPUT VOLTAGE RANGE | ||||||
| VCM | Common-mode voltage | VS = 1.8 V to 5.5 V | (V–) – 0.1 | (V+) + 0.1 | V | |
| CMRR | Common-mode rejection ratio | VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) – 1.4 V, TA = –40°C to +125°C |
80 | 96 | dB | |
| VS = 5.5 V, VCM = –0.1 V to 5.6 V, TA = –40°C to +125°C |
62 | 79 | ||||
| VS = 1.8 V, (V–) – 0.1 V < VCM < (V+) – 1.4 V, TA = –40°C to +125°C |
88 | |||||
| VS = 1.8 V, VCM = –0.1 V to 1.9 V, TA = –40°C to +125°C |
72 | |||||
| INPUT BIAS CURRENT | ||||||
| IB | Input bias current | ±2 | ±18(2) | pA | ||
| TA = –40°C to +125°C | ±525(2) | pA | ||||
| IOS | Input offset current | ±1 | ±15(2) | pA | ||
| TA = –40°C to +125°C | ±440(2) | pA | ||||
| NOISE | ||||||
| En | Input voltage noise (peak-to-peak) | VS = 5 V, f = 0.1 Hz to 10 Hz | 6 | μVPP | ||
| en | Input voltage noise density | VS = 5 V, f = 10 kHz | 15 | nV/√Hz | ||
| VS = 5 V, f = 1 kHz | 20 | nV/√Hz | ||||
| in | Input current noise density | f = 1 kHz | 18 | fA/√Hz | ||
| INPUT CAPACITANCE | ||||||
| CID | Differential | 2 | pF | |||
| CIC | Common-mode | 4 | pF | |||
| OPEN-LOOP GAIN | ||||||
| AOL | Open-loop voltage gain | VS = 1.8 V, (V–) + 0.04 V < VO < (V+) – 0.04 V, RL = 10 kΩ |
106 | dB | ||
| VS = 5.5 V, (V–) + 0.05 V < VO < (V+) – 0.05 V, RL = 10 kΩ |
104 | 128 | ||||
| VS = 1.8 V, (V–) + 0.06 V < VO < (V+) – 0.06 V, RL = 2 kΩ |
108 | |||||
| VS = 5.5 V, (V–) + 0.15 V < VO < (V+) – 0.15 V, RL = 2 kΩ |
130 | |||||
| FREQUENCY RESPONSE | ||||||
| GBP | Gain bandwidth product | VS = 5.5 V, G = +1 | 5 | MHz | ||
| φm | Phase margin | VS = 5.5 V, G = +1 | 60 | Degrees | ||
| SR | Slew rate | VS = 5.5 V, G = +1, CL = 130pF | 15 | V/μs | ||
| tS | Settling time | To 0.1%, VS = 5.5 V, 2-V step , G = +1, CL = 100 pF | 0.75 | μs | ||
| To 0.01%, VS = 5.5 V, 2-V step , G = +1, CL = 100 pF | 1 | |||||
| tOR | Overload recovery time | VS = 5.5 V, VIN × gain > VS | 0.3 | μs | ||
| THD + N | Total harmonic distortion + noise(1) | VS = 5.5 V, VCM = 2.5 V, VO = 1 VRMS, G = +1, f = 1 kHz | 0.0006% | |||
| OUTPUT | ||||||
| VO | Voltage output swing from supply rails | VS = 5.5 V, RL = 10 kΩ, | 16 | mV | ||
| VS = 5.5 V, RL = 2 kΩ, | 40 | |||||
| ISC | Short-circuit current | VS = 5 V | ±50 | mA | ||
| ZO | Open-loop output impedance | VS = 5 V, f = 5 MHz | 250 | Ω | ||
| POWER SUPPLY | ||||||
| IQ | Quiescent current per amplifier | VS = 5.5 V, IO = 0 mA, | 330 | 450 | μA | |
| VS = 5.5 V, IO = 0 mA, TA = –40°C to +125°C | 475 | |||||
| SHUTDOWN | ||||||
| IQSD | Quiescent current per amplifier | VS = 1.8 to 5.5 V, all amplifiers disabled, SHDN = V- | 0.35 | 1 | μA | |
| ZSHDN | Output impedance | VS = 1.8 to 5.5 V, amplifier disabled | 10 || 2 | G? || pF | ||
| High-level voltage shutdown threshold (amplifier enabled) | VS = 1.8 to 5.5 V | (V-) + 0.9 | (V-) + 1.1 | V | ||
| Low-loevel voltage shutdown threshold (amplifeir disabled) | VS = 1.8 to 5.5 V | (V-) + 0.2 | (V-) + 0.7 | V | ||
| tON | Amplifier enabled time (full shutdown (3) (4) | 35 | μS | |||
| tON | Amplifier enabled time (partial shutdown ) (3) (4) | 10 | μS | |||
| tOFF | Amplifier diabled time (3) | 6 | μS | |||
| SHDN pin input bias current (per pin) | VS = 1.8 V to 5.5 V, V+ ≥ (V+) - 0.8 V | 6.5 | nA | |||
| SHDN pin input bias current (per pin) | VS = 1.8 V to 5.5 V, V+ ≤ (V-) + 0.8 V | 155 | nA | |||