ZHCSEK0C November 2015 – October 2024 THS4541-Q1
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Device Comparison Table
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics: (Vs+) – Vs– = 5 V
- 6.6 Electrical Characteristics: (Vs+) – Vs– = 3 V
- 6.7 Typical Characteristics: 5-V Single Supply
- 6.8 Typical Characteristics: 3-V Single Supply
- 6.9 Typical Characteristics: 3-V to 5-V Supply Range
-
7 Parameter Measurement Information
- 7.1 Example Characterization Circuits
- 7.2 Frequency-Response Shape Factors
- 7.3 I/O Headroom Considerations
- 7.4 Output DC Error and Drift Calculations and the Effect of Resistor Imbalances
- 7.5 Noise Analysis
- 7.6 Factors Influencing Harmonic Distortion
- 7.7 Driving Capacitive Loads
- 7.8 Thermal Analysis
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3 Feature Description
- 8.4
Device Functional Modes
- 8.4.1
Operation from Single-Ended Sources to Differential Outputs
- 8.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
- 8.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
- 8.4.1.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
- 8.4.1.4 Input Impedance for the Single-Ended to Differential FDA Configuration
- 8.4.2 Differential-Input to Differential-Output Operation
- 8.4.1
Operation from Single-Ended Sources to Differential Outputs
- 9 Application and Implementation
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
7.7 Driving Capacitive Loads
A very common requirement is driving the capacitive load of an ADC or some other next stage device. Directly driving a capacitive load with a closed-loop amplifier such as the THS4541-Q1 can lead to an unstable response, as shown in the step response plots into a capacitive load (see Figure 6-8 and Figure 6-26). One typical remedy for this instability is to add two small series resistors (Ro in Figure 7-11) at the outputs of the THS4541-Q1. Figure 6-6 and Figure 6-24 provide parametric plots of recommended Ro values versus differential capacitive load values and gain.
Figure 7-11 Including Ro When Driving
Capacitive LoadsOperating at higher gains requires lower Ro values to achieve a ±0.5-dB flat response for the same capacitive load. Some direct parasitic loading is acceptable with no series Ro that increases with gain setting, as illustrated in Figure 6-6 and Figure 6-24 where the Ro value is 0 Ω. Even when these plots suggest no series Ro is required, good practice is to include a place for the Ro elements in the board layout (0-Ω load initially) for later adjustment, in case the response appears unacceptable. The TINA simulation model does a good job of predicting this effect and showing the impact for different choices of capacitive load isolating resistors (Ro).