SCES636B AUGUST 2005 – April 2015 SN74LVC16T245
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Description (continued)
- 6 Pin Configuration and Functions
-
7 Specifications
- 7.1 Absolute Maximum Ratings
- 7.2 ESD Ratings
- 7.3 Recommended Operating Conditions
- 7.4 Thermal Information
- 7.5 Electrical Characteristics
- 7.6 Switching Characteristics: VCCA = 1.8 V ±0.15 V
- 7.7 Switching Characteristics: VCCA = 2.5 V ±0.2 V
- 7.8 Switching Characteristics: VCCA = 3.3 V ±0.3 V
- 7.9 Switching Characteristics: VCCA = 5 V ±0.5 V
- 7.10 Operating Characteristics
- 7.11 Typical Characteristics
- 8 Parameter Measurement Information
- 9 Detailed Description
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數據表獲取器件具體的封裝圖。
機械數據 (封裝 | 引腳)
- DGG|48
- DL|48
- DGV|48
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
1 Features
- Control Inputs VIH/VIL Levels are Referenced to VCCA Voltage
- VCC Isolation Feature – If Either VCC Input is at GND, Both Ports are in the High-Impedance State
- Overvoltage-Tolerant Inputs and Outputs Allow Mixed Voltage-Mode Data Communications
- Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
2 Applications
- Personal Electronics
- Industrial
- Enterprise
- Telecom
3 Description
This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC16T245 device is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| SN74LVC16T245 | TSSOP (48) | 12.50 mm × 6.10 mm |
| TVSOP (48) | 9.70 mm × 4.40 mm | |
| SSOP (48) | 15.88 mm × 7.49 mm | |
| BGA MICROSTAR JUNIOR (56) | 7.00 mm × 4.50 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Logic Diagram (Positive Logic)
