SLAS421B April   2004  – November 2016 MSP430F423 , MSP430F425 , MSP430F427

PRODUCTION DATA.  

1. 1Device Overview
   1. 1.1 Features
   2. 1.2 Applications
   3. 1.3 Description
   4. 1.4 Functional Block Diagram
2. 2Revision History
3. 3Device Comparison
   1. 3.1 Related Products
4. 4Terminal Configuration and Functions
   1. 4.1 Pin Diagram
   2. 4.2 Signal Descriptions
5. 5Specifications
   1. 5.1  Absolute Maximum Ratings
   2. 5.2  ESD Ratings
   3. 5.3  Recommended Operating Conditions
   4. 5.4  Supply Current Into AVCC and DVCC Excluding External Current
   5. 5.5  Thermal Resistance Characteristics, PM Package (LQFP64)
   6. 5.6  Schmitt-Trigger Inputs − Ports (P1 and P2), RST/NMI, JTAG (TCK, TMS, TDI/TCLK,TDO/TDI)
   7. 5.7  Inputs P1.x, P2.x, TAx
   8. 5.8  Leakage Current − Ports (P1 and P2)
   9. 5.9  Outputs − Ports (P1 and P2)
   10. 5.10 Output Frequency
   11. 5.11 Typical Characteristics - Ports P1 and P2
   12. 5.12 Wake-up Time From LPM3
   13. 5.13 RAM
   14. 5.14 LCD
   15. 5.15 USART0
   16. 5.16 POR, BOR
   17. 5.17 SVS (Supply Voltage Supervisor and Monitor)
   18. 5.18 DCO
   19. 5.19 Crystal Oscillator, LFXT1 Oscillator
   20. 5.20 SD16 Power Supply and Operating Characteristics
   21. 5.21 SD16 Analog Input Range
   22. 5.22 SD16 Analog Performance
   23. 5.23 SD16 Built-in Temperature Sensor
   24. 5.24 SD16 Built-in Voltage Reference
   25. 5.25 SD16 Built-in Reference Output Buffer
   26. 5.26 SD16 External Reference Input
   27. 5.27 Flash Memory
   28. 5.28 JTAG Interface
   29. 5.29 JTAG Fuse
6. 6Detailed Description
   1. 6.1  CPU
   2. 6.2  Instruction Set
   3. 6.3  Operating Modes
   4. 6.4  Interrupt Vector Addresses
   5. 6.5  Special Function Registers
   6. 6.6  Memory Organization
   7. 6.7  Bootloader (BSL)
   8. 6.8  Flash Memory
   9. 6.9  Peripherals
      1. 6.9.1  Oscillator and System Clock
      2. 6.9.2  Brownout, Supply Voltage Supervisor (SVS)
      3. 6.9.3  Digital I/O
      4. 6.9.4  Basic Timer1
      5. 6.9.5  LCD Driver
      6. 6.9.6  Watchdog Timer (WDT+)
      7. 6.9.7  Timer_A3
      8. 6.9.8  USART0
      9. 6.9.9  Hardware Multiplier
      10. 6.9.10 SD16
      11. 6.9.11 Peripheral File Map
   10. 6.10 Input/Output Diagrams
       1. 6.10.1 Port P1 (P1.0 and P1.1) Input/Output With Schmitt Trigger
       2. 6.10.2 Port P1 (P1.2 to P1.7) Input/Output With Schmitt Trigger
       3. 6.10.3 Port P2 (P2.0 and P2.1) Input/Output With Schmitt Trigger
       4. 6.10.4 Port P2 (P2.2 to P2.5) Input/Output With Schmitt Trigger
       5. 6.10.5 Port P2 (P2.6 and P2.7) Unbonded GPIOs
       6. 6.10.6 JTAG Pins TMS, TCK, TDI/TCLK, TDO/TDI, Input/Output With Schmitt-Trigger or Output
       7. 6.10.7 JTAG Fuse Check Mode
7. 7Device and Documentation Support
   1. 7.1  Getting Started and Next Steps
   2. 7.2  Device Nomenclature
   3. 7.3  Tools and Software
   4. 7.4  Documentation Support
   5. 7.5  Related Links
   6. 7.6  Community Resources
   7. 7.7  Trademarks
   8. 7.8  Electrostatic Discharge Caution
   9. 7.9  Export Control Notice
   10. 7.10 Glossary
8. 8Mechanical, Packaging, and Orderable Information