9.2.1.1 Design Requirements

For typical switched capacitor applications, use the parameters in Table 2:

9.2.1.2 Detailed Design Procedure

The main application of MAX660 is to generate a negative supply voltage. The voltage inverter circuit uses only two external capacitors as shown in the Figure 14. The range of the input supply voltage is 1.5 V to 5.5 V. For a supply voltage less than 3.5 V, the LV pin must be connected to ground to bypass the internal regulator circuitry. This gives the best performance in low-voltage applications. If the supply voltage is greater than 3.5 V, LV may be connected to ground or left open. The choice of leaving LV open simplifies the direct substitution of the MAX660 for the LMC7660 switched capacitor voltage converter.

The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistor. The voltage source equals −(V+). The output resistance R_out is a function of the ON resistance of the internal MOS switches, the oscillator frequency, and the capacitance and ESR of C₁ and C₂. A good approximation is:

Equation 1.

where

• R_SW is the sum of the ON resistance of the internal MOS switches shown in Figure 13.

High-value, low-ESR capacitors reduce the output resistance. Instead of increasing the capacitance, the oscillator frequency can be increased to reduce the 2/(ƒ_OSCc × C1) term. Once this term is trivial compared with R_SW and ESRs, further increase to oscillator frequency and capacitance become ineffective. The peak-to-peak output voltage ripple is determined by the oscillator frequency, and the capacitance and ESR of the output capacitor C2:

Equation 2.

Again, using a low-ESR capacitor results in lower ripple.

9.2.1.2.1 Capacitor Selection

The output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capacitors. The output voltage drop is the load current times the output resistance, and the power efficiency is shown in Equation 3:

Equation 3.

where

• I_Q(V+) is the quiescent power loss of the device
• I_L²_ROUT is the conversion loss associated with the switch on-resistance, the two external capacitors and their ESRs

Because the switching current charging and discharging C1 is approximately twice that of the output current, the effect of the ESR of the pumping capacitor C1 is multiplied by four in the output resistance. The output capacitor C2 is charging and discharging at a current approximately equal to the output current; therefore, its ESR only counts once in the output resistance. However, the ESR of C2 directly affects the output voltage ripple. Therefore, TI recommends low-ESR capacitors (Table 3) for both capacitors to maximize efficiency, reduce the output voltage drop and voltage ripple. For convenience, C1 and C2 are usually chosen to be the same. The output resistance varies with the oscillator frequency and the capacitors. In Figure 15, the output resistance vs oscillator frequency curves are drawn for three different tantalum capacitors. At very low frequency range, capacitance plays the most important role in determining the output resistance. Once the frequency is increased to some point (such as 20 kHz for the 150-μF capacitors), the output resistance is dominated by the ON resistance of the internal switches and the ESRs of the external capacitors. A low-value, smaller size capacitor usually has a higher ESR compared with a larger size capacitor of the same type. For lower ESR, use ceramic capacitors.

Figure 15. Output Source Resistance vs Oscillator Frequency

Table 3. Low-ESR Capacitor Manufacturers

MANUFACTURER	CAPACITOR TYPE
Nichicon Corp.	PM, PJ series, through-hole aluminum electrolytic
AVX Corp.	TPS series, surface-mount tantalum
Vishay Sprague	593D, 594D, 595D series, surface-mount tantalum
Sanyo	OS-CON series, through-hole aluminum electrolytic

9.2.1.2.2 Paralleling Devices

Any number of MAX660 devices can be paralleled to reduce the output resistance. Each device must have its own pumping capacitor C₁, while only one output capacitor C_OUT is required as shown in Figure 16. The composite output resistance is:

Equation 4. R_OUT = R_OUT of each MAX660 / Number of Devices

Figure 16. Lowering Output Resistance by Paralleling Devices

9.2.1.2.3 Cascading Devices

Cascading the MAX660s is an easy way to produce a greater negative voltage (as shown in Figure 17). If n is the integer representing the number of devices cascaded, the unloaded output voltage V_out is (−nV_in). The effective output resistance is equal to the weighted sum of each individual device:

Equation 5.

A three-stage cascade circuit shown in Figure 18 generates −3 V_in, from V_in.

Cascading is also possible when devices are operating in doubling mode. In Figure 19, two devices are cascaded to generate 3 V_IN.

An example of using the circuit in Figure 18 or Figure 19 is generating +15 V or −15 V from a +5-V input.

NOTE

The number of n is practically limited because the increasing of n significantly reduces the efficiency and increases the output resistance and output voltage ripple.

Figure 17. Increasing Output Voltage by Cascading Devices

Figure 18. Generating −3V_IN From +V_IN

Figure 19. Generating +3V_IN From +V_IN

9.2.1.2.4 Regulating Output Voltage

Output of the MAX660 can be regulated by use of a low-dropout regulator (such as LP2951). The whole converter is depicted in Figure 20. This converter can give a regulated output from −1.5 V to −5.5 V by choosing the proper resistor ratio:

Equation 6.

The error flag on pin 5 of the LP2951 goes low when the regulated output at pin 4 drops by about 5%. The LP2951 can be shut down by taking pin 3 high.

Figure 20. Combining MAX660 With LP2951 to Make a Negative Regulator

As shown in Figure 21 by operating MAX660 in voltage doubling mode and adding a linear regulator (such as LP2981) at the output, the user can get +5-V output from an input as low as +3 V.

Figure 21. Generating +5 V From +3-V Input Voltage

9.2.1.3 Application Curves

Figure 22. Efficiency vs Load Current

Figure 23. Efficiency vs Oscillator Frequency

9.2.2.1 Design Requirements

The MAX660 can operate as a positive voltage doubler (as shown in the Figure 24). The doubling function is achieved by reversing some of the connections to the device. The input voltage is applied to the GND pin with an allowable voltage from 2.5 V to 5.5 V. The V+ pin is used as the output. The LV pin and OUT pin must be connected to ground. The OSC pin cannot be driven by an external clock in this operation mode. The unloaded output voltage is twice of the input voltage and is not reduced by the forward drop of the diode (D₁) .

9.2.2.2 Detailed Design Procedure

The Schottky diode D₁ is only needed for start-up. The internal oscillator circuit uses the V+ pin and the LV pin (connected to ground in the voltage doubler circuit) as its power rails. Voltage across V+ and LV must be larger than 1.5 V to ensure the operation of the oscillator. During start-up, D₁ is used to charge up the voltage at V+ pin to start the oscillator; also, it protects the device from turning on its own parasitic diode and potentially latching up. Therefore, the Schottky diode D₁ must have enough current carrying capability to charge the output capacitor at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning on. A Schottky diode like 1N5817 can be used for most applications. If the input voltage ramp is less than 10V/ms, a smaller Schottky diode like MBR0520LT1 can be used to reduce the circuit size.