Table 4. List of Components for Design 1⁽¹⁾

8.2.1.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the LM5166 device with the WEBENCH® Power Designer.

1. Start by entering the input voltage (V_IN), output voltage (V_OUT), and output current (I_OUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability.

In most cases, these actions are available:

• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
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Get more information about WEBENCH tools at www.ti.com/WEBENCH.

8.2.1.2.2 Feedback Resistors – R_FB1, R_FB2

While the 5-V fixed output version of the LM5166 is suitable here, the adjustable version is chosen to provide the user with the option to trim or margin the output voltage if needed. The feedback resistor divider network comprises the upper feedback resistor R_FB1 and lower feedback resistor R_FB2. Select R_FB1 of 309 kΩ to minimize quiescent current and improve light-load efficiency in this application. With the desired output voltage setpoint of 5 V and V_FB = 1.223 V, calculate the resistance of R_FB2 using Equation 15 as 100.1 kΩ. Choose the closest available standard value of 100 kΩ for R_FB2. See Adjustable Output Voltage (FB) for more details.

8.2.1.2.3 Switching Frequency – R_T

The switching frequency of a COT-configured LM5166 is set by the on-time programming resistor at the RT pin. Using Equation 4, a standard 1% resistor of 309 kΩ gives a switching frequency of 92 kHz. Including the inductor R_DCR and R_DSON2 in the calculation of t_OFF (Equation 3) gives an adjusted F_SW of 101 kHz at 500 mA. The LM5166 Quickstart Calculator estimates and plots the switching frequency as a function of load current.

Note that at very low duty cycles, the minimum controllable on-time of the high-side MOSFET, T_ON(min), of 180 ns may affect choice of switching frequency. In CCM, T_ON(min) limits the voltage conversion step-down ratio for a given switching frequency. The minimum controllable duty cycle is given by Equation 19.

Equation 19.

Given a fixed T_ON(min), it follows that higher switching frequency implies a larger minimum controllable duty cycle. Ultimately, the choice of switching frequency for a given output voltage affects the available input voltage range, solution size, and efficiency. The maximum supply voltage for a given T_ON(min) before switching frequency reduction occurs is given by Equation 20.

Equation 20.

8.2.1.2.4 Filter Inductance – L_F

The inductor ripple current (assuming CCM operation) and peak inductor current are given respectively by Equation 21 and Equation 22.

Equation 21.

Equation 22.

For most applications, choose the inductance such that the inductor ripple current, ΔI_L, is between 30% and 60% of the rated load current at nominal input voltage. Calculate the inductance using Equation 23.

Equation 23.

Choosing a 150-μH inductor in this design results in 295-mA peak-to-peak ripple current at nominal input voltage of 24 V, equivalent to 59% of the 500-mA rated load current. The peak inductor current at maximum input voltage of 65 V is 675 mA, which is sufficiently below the LM5166 peak current limit of 750 mA.

Check the inductor datasheet to ensure that the inductor saturation current is well above the current limit setting of a particular design. Ferrite designs have low core loss and are preferred at high switching frequencies, so design goals can then concentrate on copper loss and preventing saturation. However, ferrite core materials exhibit a hard saturation characteristic – the inductance collapses abruptly when the saturation current is exceeded. This results in an abrupt increase in inductor ripple current, higher output voltage ripple, not to mention reduced efficiency and compromised reliability. Note that inductor saturation current generally decreases as the core temperature increases.

8.2.1.2.5 Output Capacitors – C_OUT

Select the output capacitor to limit the capacitive voltage ripple at the converter output. This is the sinusoidal ripple voltage that arises from the triangular ripple current flowing in the capacitor. Select an output capacitance using Equation 24 to limit the capacitive voltage ripple component to 0.5% of the output voltage.

Equation 24.

Substituting ΔI_L(nom) of 295 mA and ΔV_OUT of 25 mV gives C_OUT greater than 16 μF. Mindful of the voltage coefficient of ceramic capacitors, select a 47-μF, 10-V capacitor with a high-quality dielectric.

8.2.1.2.6 Ripple Generation Network – R_ESR, C_FF

For this design, the Type 2 ripple generation method is selected as it offers a good balance between cost and output voltage ripple. For other methods, see Ripple Generation Methods.

Select a series resistor, R_ESR, such that sufficient ripple in phase with the inductor current ripple appears at the feedback node, FB, using Equation 7 and Equation 8. Select a feedforward capacitor, C_FF, using Equation 9.

With ΔI_L(nom) of 295 mA at the nominal input voltage of 24 V, the required R_ESR is 0.11 Ω. The required feedforward capacitance, C_FF, is 100 pF. Calculate the total output voltage ripple in CCM using Equation 25.

Equation 25.

8.2.1.2.7 Input Capacitor – C_IN

An input capacitor is necessary to limit the input ripple voltage while providing switching-frequency AC current to the buck power stage. To minimize the parasitic inductance in the switching loop, position the input capacitors as close as possible to the VIN and GND pins of the LM5166. The input capacitors conduct a trapezoidal-wave current of peak-to-peak amplitude equal to the output current. It follows that the resultant capacitive component of AC ripple voltage is a triangular waveform. Together with the ESR-related ripple component, the peak-to-peak input ripple voltage amplitude is given by Equation 26.

Equation 26.

The input capacitance required for a particular load current, based on an input voltage ripple specification of ΔV_IN, is given by Equation 27.

Equation 27.

The recommended high-frequency input capacitance is 2.2 μF or higher and should be a high-quality ceramic component with sufficient voltage rating. Based on the voltage coefficient of ceramic capacitors, choose a voltage rating of twice the maximum input voltage. Additionally, some bulk capacitance is required if the LM5166 circuit is not located within approximately 5 cm from the input voltage source. This capacitor provides damping to the resonance associated with parasitic inductance of the supply lines and high-Q ceramics.

8.2.1.2.8 Soft-Start Capacitor – C_SS

Connect an external soft-start capacitor for a specific soft-start time. In this example, select a soft-start capacitance of 33 nF based on Equation 18 to achieve a soft-start time of 4 ms.

8.2.1.2.9 Application Curves

Unless otherwise stated, application performance curves were taken at T_A = 25°C.

LF = 150 µH COUT = 47 µF

FSW(nom) = 100 kHz RRT = 309 kΩ

Figure 53. Converter Efficiency

Time Scale: 20 ms/Div CH1: VSW, 5 V/Div

CH2: VOUT, 50 mV/Div CH4: IL, 200 mA/Div

Figure 55. No-Load Switching Waveforms, V_IN = 24 V

Time Scale: 2 ms/Div CH1: VIN, 3 V/Div

CH2: VOUT, 1 V/Div CH4: IL, 200 mA/Div

Figure 57. Full-Load Start-Up, V_IN = 24 V

Time Scale: 2 ms/Div CH1: VEN, 1 V/Div

CH2: VOUT, 1 V/Div CH4: IOUT, 200 mA/Div

Figure 59. ENABLE On and Off; V_OUT Prebiased to 1.8 V
V_IN = 24 V, No Load

Time Scale: 1 ms/Div

CH2: VOUT, 2 V/Div CH4: IL, 200 mA/Div

Figure 61. Short-Circuit Entry

LF = 150 µH COUT = 47 µF

FSW(nom) = 100 kHz RRT = 309 kΩ

Figure 54. Converter Regulation

Time Scale: 10 µs/Div CH1: VSW, 5 V/Div

CH2: VOUT, 50 mV/Div CH4: IL, 200 mA/Div

Figure 56. Full-Load Switching Waveforms, V_IN = 24 V

Time Scale: 100 µs/Div CH1: VSW, 4 V/Div

CH4: IL, 200 mA/Div

Figure 58. Short Circuit, V_IN = 24 V

Time Scale: 2 ms/Div CH1: VEN, 5 V/Div

CH2: VOUT, 1 V/Div CH4: IOUT, 200 mA/Div

Figure 60. ENABLE On and Off; V_OUT Prebiased to 1.8 V
V_IN = 24 V, 500 mA Load

Time Scale: 1 ms/Div

CH2: VOUT, 2 V/Div CH4: IL, 200 mA/Div

Figure 62. Short-Circuit Recovery

Table 5. List of Components for Design 2⁽¹⁾

8.2.2.2.1 Feedback Resistors – R_FB1, R_FB2

The output voltage of the LM5166 is externally adjustable using a resistor divider network. The divider network comprises the upper feedback resistor R_FB1 and lower feedback resistor R_FB2. Select R_FB1 of 169 kΩ to minimize quiescent current and improve light-load efficiency in this application. With the desired output voltage setpoint of 3.3 V and V_FB = 1.223 V, calculate the resistance of R_FB2 using Equation 15 as 100.1 kΩ. Choose the closest available standard value of 100 kΩ for R_FB2. See Adjustable Output Voltage (FB) for more detail.

8.2.2.2.2 Switching Frequency – R_T

The switching frequency of a COT-configured LM5166 is set by the on-time programming resistor at the RT pin. Using Equation 4, a standard 1% resistor of 100 kΩ gives a switching frequency of 190 kHz. Including the inductor R_DCR and R_DSON2 in the calculation of t_OFF (Equation 3) gives an adjusted F_SW of 215 kHz at 500 mA. The LM5166 Quick-Start Design Tool estimates and plots the switching frequency as a function of load current.

Note that at very low duty cycles, the minimum controllable on-time of the high-side MOSFET, T_ON(min), of 180 ns may affect choice of switching frequency. In CCM, T_ON(min) limits the voltage conversion step-down ratio for a given switching frequency. The minimum controllable duty cycle is given by Equation 19.

Given a fixed T_ON(min), it follows that higher switching frequency implies a larger minimum controllable duty cycle. Ultimately, the choice of switching frequency for a given output voltage affects the available input voltage range, solution size, and efficiency. The maximum supply voltage for a given T_ON(min) before switching frequency reduction occurs is given by Equation 20.

8.2.2.2.3 Filter Inductance – L_F

The inductor ripple current (assuming CCM operation) and peak inductor current are given respectively by Equation 21 and Equation 22. For most applications, choose an inductance such that the inductor ripple current, ΔI_L, is between 30% and 60% of the rated load current at nominal input voltage. Calculate the inductance using Equation 23.

Choosing a 47-μH inductor in this design results in 275-mA peak-to-peak ripple current at nominal input voltage of 12 V, equivalent to 55% of the 500-mA rated load current. The peak inductor current at maximum input voltage of 65 V is 694 mA, which is sufficiently below the LM5166 peak current limit of 750 mA.

8.2.2.2.4 Output Capacitors – C_OUT

Select the output capacitor to limit the capacitive voltage ripple at the converter output. This is the sinusoidal ripple voltage that arises from the triangular ripple current flowing in the capacitor. Select an output capacitance using Equation 24 to limit the capacitive voltage ripple component to 0.5% of the output voltage.

Substituting ΔI_L(nom) of 275 mA and ΔV_OUT of 25 mV gives C_OUT greater than 11 μF. Mindful of the voltage coefficient of ceramic capacitors, select a 47-μF, 10-V capacitor with a high-quality dielectric.

8.2.2.2.5 Ripple Generation Network – R_ESR

For this design, the Type 1 ripple generation method is selected as it only requires a single external component. For other schemes, see Ripple Generation Methods.

Select a series resistor, R_ESR, using Equation 5 and Equation 6 such that sufficient ripple in phase with the SW node voltage appears at the feedback node, FB. With ΔI_L(nom) of 275 mA at the nominal input voltage of 12 V, the required R_ESR is 0.2 Ω. Calculate the total output voltage ripple in CCM using Equation 25.

8.2.2.2.6 Input Capacitor – C_IN

An input capacitor is necessary to limit the input ripple voltage while providing switching-frequency AC current to the buck power stage. To minimize the parasitic inductance in the switching loop, position the input capacitors as close as possible to the VIN and GND pins of the LM5166. The input capacitors conduct a trapezoidal-wave current of peak-to-peak amplitude equal to the output current. It follows that the resultant capacitive component of AC ripple voltage is a triangular waveform. Together with the ESR-related ripple component, the peak-to-peak input ripple voltage amplitude is given by Equation 26. The input capacitance required for a particular load current, based on an input voltage ripple specification of ΔV_IN, is given by Equation 27.

The recommended high-frequency capacitance is 2.2 μF or higher and should be a high-quality ceramic with sufficient voltage rating. Based on the voltage coefficient of ceramic capacitors, choose a voltage rating of twice the maximum input voltage. Additionally, some bulk capacitance is required if the LM5166 circuit is not located within approximately 5 cm from the input voltage source. This capacitor provides damping to the resonance associated with parasitic inductance of the supply lines and high-Q ceramics.

8.2.2.2.7 Soft-Start Capacitor – C_SS

Connect an external soft-start capacitor for a specific soft-start time. In this example, select a soft-start capacitance of 47 nF based on Equation 18 to achieve a soft-start time of 6 ms.

8.2.2.2.8 Application Curves

Unless otherwise stated, application curves were taken at T_A = 25°C.

LF = 47 µH COUT = 47 µF

FSW(nom) = 200 kHz RRT = 100 kΩ

Figure 64. Converter Efficiency

Time Scale: 20 ms/Div CH1: VSW, 5 V/Div

CH2: VOUT, 50 mV/Div CH4: IL, 200 mA/Div

Figure 66. No-Load Switching Waveforms

Time Scale: 2 ms/Div CH1: VIN, 2 V/Div

CH2: VOUT, 1 V/Div CH4: IL, 200 mA/Div

Figure 68. Full-Load Start-Up

LF = 47 µH COUT = 47 µF

FSW(nom) = 200 kHz RRT = 100 kΩ

Figure 65. Converter Regulation

Time Scale: 5 µs/Div CH1: VSW, 5 V/Div

CH2: VOUT, 50 mV/Div CH4: IL, 200 mA/Div

Figure 67. Full-Load Switching Waveforms

Time Scale: 100 µs/Div CH1: VSW, 4 V/Div

CH4: IL, 200 mA/Div

Figure 69. Short Circuit

Table 6. List of Components for Design 3⁽¹⁾

8.2.3.2.1 Peak Current Limit Setting – R_ILIM

Install a 56.2-kΩ resistor from ILIM to GND to select a 750-mA peak current limit threshold setting to meet the rated output current of 300 mA in PFM. See Adjustable Current Limit for more detail.

8.2.3.2.2 Switching Frequency – L_F

Tie RT to GND to select PFM mode of operation. The inductor, input voltage, output voltage and peak current determine the pulse switching frequency of a PFM-configured LM5166. For a given input voltage, output voltage and peak current, the inductance of L_F sets the switching frequency when the output is in regulation. Use Equation 28 to select an inductance of 4.7 μH based on the target PFM converter switching frequency of 600 kHz at 24-V input.

Equation 28.

I_PK(PFM) in this example is the peak current limit setting of 750 mA plus the inductor current overshoot resulting from the 80-ns peak current comparator delay, t_{ILIM_delay}. An additional constraint on the inductance is the 180-ns minimum on-time of the high-side MOSFET. Therefore, to keep the inductor current well controlled, choose an inductance that is larger than L_F(min) using Equation 29 where V_IN(max) is the maximum input supply voltage for the application, t_{ILIM_delay} is 80 ns, t_ON(min) is 180 ns, the maximum current limit threshold, I_LIM(max), is 825 mA, and the maximum allowed peak inductor current, I_L(max), is 1.6 A.

Equation 29.

Choose an inductor with saturation current rating above the peak current limit setting, and allow for derating of the saturation current at the highest expected operating temperature.

8.2.3.2.3 Output Capacitors – C_OUT

The output capacitor, C_OUT, filters the inductor’s ripple current and stores energy to meet the load current requirement when the LM5166 is in sleep mode. The output ripple has a base component of amplitude V_OUT/123 related to the typical feedback comparator hysteresis in PFM. The wake-up time from sleep to active mode adds a ripple voltage component that is a function of the output current. Approximate the total output ripple by Equation 30.

Equation 30.

Also, the output capacitance must be large enough to accept the energy stored in the inductor without a large deviation in output voltage. Setting this voltage change equal to 1% of the output voltage results in a C_OUT requirement defined with Equation 31.

Equation 31.

In general, select the capacitance of C_OUT to limit the output voltage ripple at full load current, ensuring that it is rated for worst-case RMS ripple current given by I_RMS = I_PK(PFM)/2. In this design example, select a 47-μF, 6.3-V capacitor with a high-quality dielectric.

8.2.3.2.4 Input Capacitor – C_IN

The input capacitor, C_IN, filters the triangular current waveform of the high-side MOSFET (see Figure 89). To prevent large ripple voltage, use a low-ESR ceramic input capacitor sized for the worst-case RMS ripple current given by I_RMS = I_OUT/2. In this design example, choose a 2.2-μF, 50-V ceramic input capacitor with a high-quality dielectric.

8.2.3.2.5 Application Curves

Unless otherwise stated, application curves were taken at T_A = 25°C.

LF = 4.7 µH COUT = 47 µF

FSW(nom) = 600 kHz RRT = 0 Ω

Figure 71. Converter Efficiency

Time Scale: 20 ms/Div CH1: VSW, 10 V/Div

CH2: VOUT, 50 mV/Div CH4: IL, 400 mA/Div

Figure 73. No-Load Switching Waveforms, V_IN = 24 V

Time Scale: 2 ms/Div CH1: VIN, 4 V/Div

CH2: VOUT, 1 V/Div CH4: IL, 400 mA/Div

Figure 75. Full-Load Start-Up, V_IN = 24 V

LF = 4.7 µH COUT = 47 µF

FSW(nom) = 600 kHz RRT = 0 Ω

Figure 72. Converter Regulation

Time Scale: 10 µs/Div CH1: VSW, 10 V/Div

CH2: VOUT, 50 mV/Div CH4: IL, 400 mA/Div

Figure 74. Full-Load Switching Waveforms, V_IN = 24 V

Time Scale: 20 µs/Div CH1: VSW, 6 V/Div

CH4: IL, 400 mA/Div

Figure 76. Short Circuit, V_IN = 24 V

Table 7. List of Components for Design 4⁽¹⁾

8.2.4.2.1 Feedback Resistors – R_FB1, R_FB2

The output voltage of the LM5166 is externally adjustable using a resistor divider network. The divider network comprises the upper feedback resistor R_FB1 and lower feedback resistor R_FB2. Select R_FB1 of 309 kΩ to minimize quiescent current and improve light-load efficiency in this application. With the desired output voltage setpoint of 5 V and V_FB = 1.223 V, calculate the resistance of R_FB2 using Equation 15 as 99.5 kΩ. Choose the closest available standard value of 100 kΩ for R_FB2. See Adjustable Output Voltage (FB) for more detail.

8.2.4.2.2 Peak Current Limit Setting – R_ILIM

Install a 24.9-kΩ resistor from ILIM to GND to select a 1.25-A peak current limit threshold setting with modulated ILIM function to meet the rated output current of 500 mA and the efficiency target. See Adjustable Current Limit for more detail.

8.2.4.2.3 Switching Frequency – L_F

Tie RT to GND to select PFM mode of operation. The inductor, input voltage, output voltage and peak current determine the pulse switching frequency of a PFM-configured LM5166. For a given input voltage, output voltage and peak current, the inductance of L_F sets the switching frequency when the output is in regulation. Use Equation 28 to select an inductance of 22 μH based on the target PFM converter switching frequency of 100 kHz at 12-V input.

I_PK(PFM) in this example is the peak current limit setting of 1.25 A plus the inductor current overshoot resulting from the 80-ns peak current comparator delay. An additional constraint on the inductance is the 180-ns minimum on-time of the high-side MOSFET. Therefore, to keep the inductor current well controlled, choose an inductance that is larger than L_F(min) using Equation 29.

Choose an inductor with saturation current rating above the peak current limit setting, and allow for derating of the saturation current at the highest expected operating temperature.

8.2.4.2.4 Output Capacitors – C_OUT

The output capacitor, C_OUT, filters the ripple current of the inductor and stores energy to meet the load current requirement when the LM5166 is in sleep mode. The output ripple has a base component of amplitude V_OUT/123 related to the typical feedback comparator hysteresis in PFM. The wake-up time from sleep to active mode adds a ripple voltage component that is a function of the output current. Approximate the total output ripple by Equation 30.

Also, the output capacitance must be large enough to accept the energy stored in the inductor without a large deviation in output voltage. Setting this voltage change equal to 1% of the output voltage results in a C_OUT requirement defined with Equation 31.

In general, select the capacitance of C_OUT to limit the output voltage ripple at full load current, ensuring that it is rated for worst-case RMS ripple current given by I_RMS = I_PK(PFM)/2. In this design example, select two 100-μF, 10-V capacitors with a high-quality dielectric.

8.2.4.2.5 Input Capacitor – C_IN

The input capacitor, C_IN, filters the triangular current waveform of the high-side MOSFET (see Figure 89). To prevent large ripple voltage, use a low-ESR ceramic input capacitor sized for the worst-case RMS ripple current given by I_RMS = I_OUT/2. In this design example, choose a 4.7-μF, 50-V ceramic input capacitor with a high-quality dielectric.

Table 8. List of Components for Design 5⁽¹⁾

8.2.5.2.1 Peak Current Limit Setting – R_ILIM

Leave the ILIM pin open circuit to select the 500-mA peak current limit setting for a rated output current of 300 mA. See Table 3.

8.2.5.2.2 Switching Frequency – R_RT

Using Equation 4, select a standard 1% resistor value of 169 kΩ to set a switching frequency of 400 kHz.

8.2.5.2.3 Inductor – L_F

Choosing a 100-μH inductor in this design results in 150-mA peak-to-peak ripple current at an input voltage of 24 V, equivalent to 50% of the 300-mA rated load current. A larger ripple current design results in improved light-load efficiency. The peak inductor current at maximum input voltage of 65 V is 424 mA, which is sufficiently below the LM5166 peak current limit of 500 mA. Select an inductor with saturation current rating well above the peak current limit setting, and allow for derating of the saturation current at the highest expected operating temperature.

8.2.5.2.4 Input and Output Capacitors – C_IN, C_OUT

Choose a 4.7-µF, 80-V or 100-V ceramic input capacitor with 1210 footprint. Such a capacitor is typically available in X7S or X7R dielectric. Based on Equation 24, select a 10-µF, 25-V ceramic output capacitor with X7R dielectric and 1206 footprint.

8.2.5.2.5 Feedback Resistors – R_FB1, R_FB2

Select R_FB1 of 1 MΩ to minimize quiescent current and improve light-load efficiency in this application. With the desired output voltage setpoint of 12 V and V_FB = 1.223 V, calculate the resistance of R_FB2 using Equation 15 as 113.5 kΩ. Choose the closest available standard value of 113 kΩ for R_FB2. See Adjustable Output Voltage (FB) for more detail.

8.2.5.2.6 Ripple Generation Network – R_A, C_A, C_B

Select the ripple injection circuit components R_A and C_A values using Equation 10 and Equation 11. Choose capacitor C_B using Equation 12 based on a target transient response settling time of 300 µs.

8.2.5.2.7 Undervoltage Lockout Setpoint – R_UV1, R_UV2, R_HYS

Adjust the undervoltage lockout (UVLO) using an externally-connected resistor divider network of R_UV1, R_UV2, and R_HYS. The UVLO has two thresholds, one for power up when the input voltage is rising and one for power down or brownouts when the input voltage is falling. The EN rising threshold for the LM5166 is 1.22 V.

Rearranging Equation 16 and Equation 17, the expressions to calculate R_UV2 and R_HYS are as follows:

Equation 32.

Equation 33.

Choose R_UV1 as 10 MΩ to minimize input quiescent current. Given the desired input voltage UVLO thresholds of 20 V and 18 V, calculate the resistance of R_UV2 and R_HYS as 649 kΩ and 14 kΩ, respectively. See Precision Enable (EN) and Hysteresis (HYS) for more detail.

8.2.5.2.8 Soft Start – C_SS

Install a 47-nF capacitor from SS to GND for a soft-start time of 6 ms.