ZHCSM23 December 2021 LDC3114
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4 Device Functional Modes
- 7.5 Register Maps
-
8 Application and Implementation
- 8.1
Application Information
- 8.1.1 Theory of Operation
- 8.1.2 Designing Sensor Parameters
- 8.1.3 Setting COM Pin Capacitor
- 8.1.4 Defining Power-On Timing
- 8.1.5 Configuring Button or Raw Data Scan Rate
- 8.1.6 Programming Button or Raw Data Sampling Window
- 8.1.7 Scaling Frequency Counter Output
- 8.1.8 Setting Button Triggering Threshold
- 8.1.9 Tracking Baseline
- 8.1.10 Mitigating False Button Detections
- 8.1.11 Reporting Interrupts for Button Presses, Raw Data Ready and Error Conditions
- 8.1.12 Estimating Supply Current
- 8.2 Typical Application
- 8.1
Application Information
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
7.3.8 I2C Interface
The LDC3114 features an I2C Interface that can be used to program the internal registers and read channel data. Before reading the OUT (Address 0x01) or channel DATAn (n = 0, 1, 2 or 3, Addresses 0x02 through 0x09) registers for button press data or raw channel data, RAW_DATAn_x (n = 0, 1, 2, or 3, for each channel, x= 1, 2, or 3 splitting 24-bit data over 3 8-bit register fields), the user should always read Register STATUS (Address 0x00) first to lock the data. The LDC3114 supports burst mode with auto-incrementing register addresses. The LDC3114 has a fixed I2C address of 0x2A.
For the write sequence, there is a special handshake process that has to take place to ensure data integrity. The sequence of register writes is:
- Set CONFIG_MODE (Register RESET, Address 0x0A) bit = 1 to start the register write session.
- Poll for RDY_TO_WRITE (Register STATUS, Address 0x00) bit = 1.
- Perform I2C write to configure registers.
- Set CONFIG_MODE (Register RESET, Address 0x0A) bit = 0 to terminate the register write session.
After CONFIG_MODE is de-asserted, the new scan cycle will start in less than 1 ms. Figure 7-3 shows the waveform of the above process.
Figure 7-3 Timing Diagram Representing the States of the CONFIG_MODE and RDY_TO_WRITE Bits for an I2C Write Handshake