ZHCSDR9D July   2012  – May 2015 DS125BR401

PRODUCTION DATA.  

1. 1 特性
2. 2 應用范圍
3. 3 說明
4. 4 典型應用
5. 5 修訂歷史記錄
6. 6 說明（續）
7. 7 Pin Configuration and Functions
8. 8 Specifications
   1. 8.1 Absolute Maximum Ratings
   2. 8.2 ESD Ratings
   3. 8.3 Recommended Operating Conditions
   4. 8.4 Thermal Information
   5. 8.5 Electrical Characteristics
   6. 8.6 Electrical Characteristics — Serial Management Bus Interface
   7. 8.7 Typical Characteristics
9. 9 Detailed Description
   1. 9.1 Overview
   2. 9.2 Functional Block Diagram
   3. 9.3 Feature Description
      1. 9.3.1 Typical 4-Level Input Thresholds
   4. 9.4 Device Functional Modes
      1. 9.4.1 Pin Control Mode
      2. 9.4.2 SMBUS Mode
   5. 9.5 Programming
      1. 9.5.1 PCIe Signal Integrity
         1. 9.5.1.1 RX-Detect in SAS/SATA (up to 6 Gbps) Applications
            1. 9.5.1.1.1 Signal Detect Control for Datarates Above 8 Gbps
         2. 9.5.1.2 MODE Operation With SMBus Registers
      2. 9.5.2 SMBUS Master Mode
      3. 9.5.3 System Management Bus (SMBus) and Configuration Registers
         1. 9.5.3.1 Transfer of Data Through the SMBus
         2. 9.5.3.2 SMBus Transactions
         3. 9.5.3.3 Writing a Register
         4. 9.5.3.4 Reading a Register
   6. 9.6 Register Maps
10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
       1. 10.2.1 Design Requirements
       2. 10.2.2 Detailed Design Procedure
       3. 10.2.3 Application Curves
11. 11Power Supply Recommendations
    1. 11.1 3.3-V or 2.5-V Supply Mode Operation
    2. 11.2 Power Supply Bypassing
12. 12Layout
    1. 12.1 Layout Guidelines
       1. 12.1.1 PCB Layout Considerations for Differential Pairs
    2. 12.2 Layout Example
13. 13器件和文檔支持
    1. 13.1 文檔支持
       1. 13.1.1 相關文檔
    2. 13.2 Community Resources
    3. 13.3 商標
    4. 13.4 靜電放電警告
    5. 13.5 術語表
14. 14機械、封裝和可訂購信息