ZHCSN08D August 2020 – April 2024 DRV8714-Q1 , DRV8718-Q1
PRODMIX
When the nSLEEP pin is logic low or the DVDD power supply is below the VDVDD_POR threshold, the device enters a low power sleep state to reduce device quiescent current draw by the device. In this state, all major functional blocks are disabled aside from a low power monitor on the nSLEEP pin and the powered off braking function if enabled. Passive gate pull downs are provided for the external MOSFET gates to maintain the MOSFETs in an off state. After exiting the inactive sleep state, all device registers will be reset to defaults.