ZHCSCE2I October 2013 – March 2022 BQ76920 , BQ76930 , BQ76940
PRODMIX
| MIN | MAX | UNIT | ||||
|---|---|---|---|---|---|---|
| VBAT | Supply voltage | (BAT–VSS) | BQ76920 | –0.3 | 36 | V |
| (BAT–VC5x), (VC5x–VSS) | BQ76930 | |||||
| (BAT–VC10x), (VC10x–VC5x), (VC5x–VSS) | BQ76940 | |||||
| VI | Input voltage | (VCn–VSS) where n = 1..5 | BQ76920, BQ76930, BQ76940 | –0.3 | (n × 7.2) | V |
| (VCn-VC5x) where n = 6..10 | BQ76930, BQ76940 | (n–5) × 7.2 | ||||
| (VCn–VC10x) where n = 11..15 | BQ76940 | (n–10) × 7.2 | ||||
| Cell input pins, differential (VCn–VCn–1) where n = 1..15/10/5 (BQ76940/BQ76930/BQ76920, respectively) | –0.3 | 9 | V | |||
| SRN, SRP, SCL, SDA | –0.3 | 3.6 | V | |||
| (VC0–VSS), (CAP1–VSS), (TS1–VSS)(2) | BQ76920 | |||||
| (VC0–VSS), (VC5b–VC5x), (CAP2–VC5x), (CAP1–VSS), (TS2–VC5x), (TS1–VSS)(2) | BQ76930 | |||||
| (VC0–VSS), (VC5b–VC5x), (VC10b–VC10x), (CAP3–VC10x), (CAP2–VC5x), (CAP1–VSS), (TS3–VC10x), (TS2–VC5x), (TS1–VSS)(2) | BQ76940 | |||||
| REGSRC | –0.3 | 36 | ||||
| VO | Output voltage | REGOUT, ALERT | –0.3 | 3.6 | V | |
| DSG | –0.3 | 20 | ||||
| CHG | –0.3 | VCHGCLAMP | ||||
| ICB | Cell balancing current (per cell) | BQ76920 | 70 | mA | ||
| BQ76930, BQ76940 | 5 | mA | ||||
| IDSG | Discharge pin input current when disabled (measured into terminal) | 7 | mA | |||
| TSTG | Storage temperature | –65 | 150 | °C | ||
| Lead temperature (soldering, 10 s) | 300 | |||||