ZHCSE30C August 2015 – September 2016 BQ25120 , BQ25121
PRODUCTION DATA.
The device contains two open-drain outputs that signal its status and are valid only after the device has completed start-up into a valid state. If the part starts into a fault, interrupts will not be sent. The PG output signals when a valid input source is connected. PG pulls to GND when VIN is above VUVLO. PG is high-impedance when the input power is not within specified limits. Connect PG to the desired logic voltage rail using a 1-kΩ to 100-kΩ resistor, or use with an LED for visual indication.
The PG pin can be configured as a MR shifted (MRS) output when the PGB_MRS bit is set to 1. PG is high-impedance when the MR input is not low, and PG pulls to GND when the MR input is below VOL(TH_MRS). Connect PG to the desired logic voltage rail using a 1-kΩ to 100-kΩ resistor.
When enabled through OTP, the PG pin also functions as an OVP/UVP indicator. When the device is below VSLP or VIN(DPM) (if enabled), a single 128us pulse is sent on PG to notify the host, repeating once per minute. When the device has an input voltage greater than V(BAT) +1 V and VIN is less than VOVP, two consecutive 128us pulses are sent on PG, to notify the host, repeating once per minute. The PG pin does not function as an input power good indicator in this mode.
The INT pin is pulled low during charging when the EN_INT bit is set to 1 and interrupts are pulled high. When EN_INT is set to 0, charging status is not indicated on the INT pin. When charge is complete or disabled, INT is high impedance. The charge status is valid whether it is the first charge or recharge. When a fault occurs, a 128 µs pulse (interrupt) is sent on INT to notify the host.